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Unable to Mirror the SRAM contents to SRAM buffer in NTAG I2C 1k Memory

Question asked by KF Choong on Sep 6, 2016
Latest reply on Sep 12, 2016 by Jorge_Gonzalez

Hi Sir / Madam,

 

I am developing microcontroller firmware to communicate to outside world through NTAG NFC (Reference: NT3H1101 / NT3H1201).  I am using NTAG I2C 1k memory, and have problem understand the transfer process of pass-through mode (NC_REG, bit#6 - PTHRU_ON_OFF) in session register ( I2C block address : 0xFE) .

 

My question is as follows:

 

(1) The SRAM inside device memory start at block address 0xF8, allocate 64 bytes.  If I have written 1b to Bit#1 (SRAM_MIRROR_ON_OFF) inside NC_REG, and then written 0x01 to SRAM_MIRROR_BLOCK register,  the device will copy all SRAM contents from SRAM (block address 0xF8)  to first block of User memory (Block address 0x01).  Then, both I2C interface can read back the SRAM content from block address 0x01, with and without Pass-Through configured.  And, RF interface can read out the content of SRAM from this mirror location (block address 0x01) through NFC tag, with Pass-Through configured.  Am my understanding correct ? Please help.

 

(2) If my understanding is correct, I am not able to mirror or copy the contents of SRAM to its mirror location or buffer, although the 2 bits ( written 1b to Bit#1 SRAM_MIRROR_ON_OFF and written 0x01 to SRAM_MIRROR_BLOCK register) already configure correctly.  Please help.

 

 

Please let me know if you need any more information.

 

Please help.  Thank you for your advice.

 

 

Cheers,

KF Choong

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