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Kinetis MK21 SPI slave issue

Question asked by Philipp Kaar on Sep 1, 2016
Latest reply on Sep 5, 2016 by Jorge Antonio Alcala Vazquez

Dear all,

 

I am facing problems when transmitting data via SPI when the controller acts as SPI slave. I configured the SPI module to use RX and TX FIFO buffers and disabled all interrupt requests.

When transmitting data in polling mode the SPIx_SR[TFFF] bit will never be cleared, although I am writing more than 4 values to it. My idea is to write to the TX buffer as long as it is not full, and wait in a busy loop for free space.

Is this a known issue or am I just doing something wrong?

 

Best regards,

Philipp

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