I am working on getting secure boot enabled and working on the T4240.
The manuals that I am referencing are:
- QorIQ T4240 Family Reference Manual, Rev 1, 02/2015
- Note that the latest version of that document has the Secure Boot section removed and references to other documents are in its place
- Freescale Linux SDK v1.7, Rev B, Mar 2015
- PBL Configuration Tool User Guide, Rev 4.0, 07/2014
- Setting up Secure Boot on PBL bassed Platforms in Prototype Stage (no revision or date)
During the configuration of the PBI Data, I see that I need to write to SCRATCHRW1 for the address of the ESBC so ISBC can pass control to ESBC. However, in the T4240 Reference Manual, section 27.3, there is no longer a definition for the SCRATCHRW(n) registers.
Can it please be confirmed that the SCRATCHRW(n) registers still are defined for the T4240 and that is the correct process for the T4240?