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K60 Interrupt Priority

Question asked by David XY Zhou on Aug 31, 2016
Latest reply on Sep 1, 2016 by David XY Zhou

HI,

I have K60 Tower board: MK60FN1M0VLQ12.

 

In the reference manual, 3.2.2.1 Interrupt priority levels, and table Table 3-5. Interrupt vector assignments show the registers for each interrput. For example:

0x0000_013C 79 63 1 15 FTM1 Single interrupt vector for all sources

If I want to set the interrupt with PRIORITY 1:

I shall use register NVICIPR15, and

NVICIPR15 = 0x01;

Is this correct?

 

But the code generated by PE wizard:

//Enable Interrupt
NVICIP63 = NVIC_IP_PRI63(0x80);
/* NVICISER1: SETENA|=0x80000000 */
NVICISER1 |= NVIC_ISER_SETENA(0x80000000);
FTM1_SC |= FTM_SC_TOIE_MASK;
_int_install_isr(LDD_ivIndex_INT_FTM1, FC1_OnOverflow, NULL );

 

Why use NVICIP63 = NVIC_IP_PRI63(0x80); ?

what means to 0x80?

IPR registers contains 4 bits as stated in the section 3.2.2.1 Interrupt priority levels.

I am a little confused. What are priority levels (0-15 with 0 as highest priority?) or priorities from 0 - 0xFF ?

 

Thank you

David Zhou

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