LPC4330 EMC_CLK

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LPC4330 EMC_CLK

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tomsaluzzo
Contributor III

Refer to page 595 of the LPC4330 User Manual. Page 595 of the User Manual states that the maximum operating frequency of the EMC_CLK is 120 MHz. Refer to page 123 of the LPC4330 datasheet. The specification for Tcy(clk) (EMC_CLK) is 8.4 nS minimum. This results in a maximum EMC_CLK frequency of 119,047,619 Hz. I have a 12 MHz crystal on our PCBA and was hoping to run the EMC_CLK at 120 MHz. Can I run the EMC_CLK at 120 MHZ without any problems?

For a 120MHz EMC_CLK, the Tcy(clk) should be 8.3333ns minimum.

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bernhardfink
NXP Employee
NXP Employee

Your fully right, the numbers provided in the documentation don't really fit together.

As a matter of fact we specify the maximum EMC frequency for 120MHz. For some doc rule reasons we need to provide a time value in the tables, which always results in the problem that the frequency can't be exactly hit due to rounding. In this case it would have been better to specify the cycle time as 8.3ns and not as 8.4ns.

I will provide this as input to the product group and hope that it gets corrected.

Regards,

NXP Support Team

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