In my design, the srio port 2 ( lane A-D ) is connected to SRIO switch ( CPS-1848 ), and srio port 1 ( lane E-H ) does not connect to anything.
After initialization, I checked the P2ESCSR ( 0xfe0c0178 ) and P1ESCSR ( 0xfe0c0158 ).
P2ESCSR = 0x00000000
P1ESCSR = 0x00000001
From the P5020RM, bit 30 ( port ok ) and bit 31 ( port uninitialized ) should be mutually exclusive. But for port 2, they are both 0, which obviously contradict with the RM.
How did this happen?