EEPROM partitioning in MK20DX256VLL10

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EEPROM partitioning in MK20DX256VLL10

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xenoamor
Contributor I

Hey guys. I've had a pile of boards made up using the MK20DX256VLL10 device. At the time the software for these were not complete and now I have found that whenever I call SetFlexRAMFunction() I get an ACCERR error in the FSTAT register. I am correctly checking if the device is already partitioned by checking that GetFlexNVMPartitionCode() returns FLEX_NVM_NOT_PARTITIONED, which it does. I have tried the erase and unlock kinetis commands using a segger Jlink. Both yield the same results.

In the MK20DX256VLH7 device, which I have had the EEPROM working on, this method works.

Looking deeper into it I notice that in the table: 'Flash Commands by Mode' in the datasheet: http://www.nxp.com/files/32bit/doc/ref_manual/K20P100M100SF2V2RM.pdf?fasp=1&WT_TYPE=Reference%20Manu... the usual 0x80: Program Partition command is missing.

Has the MK20DX256VLL10 device got a unique way to partition the EEPROM? The device specification clearly states a 4kB potential EEPROM space: https://www.nxp.com/webapp/search.partparamdetail.framework?PART_NUMBER=MK20DX256VLL10

Any pointers to how to create/use the EEPROM space in this device would be much appreciated

Many thanks,

Joshua

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jeremyzhou
NXP Employee
NXP Employee

Hi Joshua,

Yes, the MK20DX256VLL10 support the Program Partition command (0x80).

And I'd like to suggest that you can utilize the standard software driver which provides particular function to execute the command and the C90TFS Flash Driver's link is below.

cache.nxp.com/files/microcontrollers/software/device_drivers/C90TFS-FLASH-DRIVER-DEVD.exe?fsrch=1&sr=3&pageNum=1


Have a great day,
Ping

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xenoamor
Contributor I

Thanks for all the help guys. I ended up using this smaller/simple eeprom library to handle this. For future reference this is the code snippet:


#include "Cpu.h"
#include "FTFL_PDD.h"

#define FlexRAM ((uint8_t *)0x14000000)
#define EEPROM_SIZE 32 // 32 Bytes

#if (EEPROM_SIZE == 2048)    // 35000 writes/byte or 70000 writes/word
  #define EEESIZE 0x33
#elif (EEPROM_SIZE == 1024)    // 75000 writes/byte or 150000 writes/word
  #define EEESIZE 0x34
#elif (EEPROM_SIZE == 512)    // 155000 writes/byte or 310000 writes/word
  #define EEESIZE 0x35
#elif (EEPROM_SIZE == 256)    // 315000 writes/byte or 630000 writes/word
  #define EEESIZE 0x36
#elif (EEPROM_SIZE == 128)    // 635000 writes/byte or 1270000 writes/word
  #define EEESIZE 0x37
#elif (EEPROM_SIZE == 64)    // 1275000 writes/byte or 2550000 writes/word
  #define EEESIZE 0x38
#elif (EEPROM_SIZE == 32)    // 2555000 writes/byte or 5110000 writes/word
  #define EEESIZE 0x39
#endif

// Prototypes
void     eeprom_init();
uint8_t     eeprom_read_byte(uint8_t addr);
void         eeprom_write_byte(uint8_t addr, uint8_t value);

void eeprom_init() {

    uint32_t count=0;
    uint16_t do_flash_cmd[] = {
        0xf06f, 0x037f, 0x7003, 0x7803,
        0xf013, 0x0f80, 0xd0fb, 0x4770};
    uint8_t status;

    if (FTFL_PDD_GetRAMReady(FTFL_BASE_PTR)) {
        // FlexRAM is configured as traditional RAM
        // We need to reconfigure for EEPROM usage

        *(uint8_t*)&FTFL_FCCOB0_REG(FTFL_BASE_PTR) = 0x80; // PGMPART = Program Partition Command
        *(uint8_t*)&FTFL_FCCOB4_REG(FTFL_BASE_PTR) = EEESIZE; // EEPROM Size
        *(uint8_t*)&FTFL_FCCOB5_REG(FTFL_BASE_PTR) = 0x03; // 0K for Dataflash, 32K for EEPROM backup

        Cpu_DisableInt();
        // do_flash_cmd() must execute from RAM.  Luckily the C syntax is simple...
        (*((void (*)(volatile uint8_t *))((uint32_t)do_flash_cmd | 1)))(&FTFL_FSTAT_REG(FTFL_BASE_PTR));
        Cpu_EnableInt();
        status = FTFL_FSTAT_REG(FTFL_BASE_PTR);
        if (status & 0x70) {
            FTFL_FSTAT_REG(FTFL_BASE_PTR) = (status & 0x70);
            return; // error
        }
    }
    // wait for eeprom to become ready (is this really necessary?)
    while (!(FTFL_PDD_GetEEEReady(FTFL_BASE_PTR))) {
        if (++count > 20000) break;
    }
}

uint8_t eeprom_read_byte(uint8_t addr) {
    uint32_t offset = (uint32_t)addr;
    if (offset >= EEPROM_SIZE) return 0;
    if (!(FTFL_PDD_GetEEEReady(FTFL_BASE_PTR))) eeprom_init();
    return FlexRAM[offset];
}

void eeprom_write_byte(uint8_t addr, uint8_t value) {
    uint32_t offset = (uint32_t)addr;

    if (offset >= EEPROM_SIZE) return;
    if (!(FTFL_PDD_GetEEEReady(FTFL_BASE_PTR))) eeprom_init();
    if (FlexRAM[offset] != value) {
        FlexRAM[offset] = value;
        while (!(FTFL_PDD_GetEEEReady(FTFL_BASE_PTR))) {}
    }
}

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CCandido
Contributor V

Hi JB,

I tested your code eeprom ok,

new question:

how to Set address base to eeprom?

example:

#define _base 0x8000 or 0xE000...

thanks,

Carlos.

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jeremyzhou
NXP Employee
NXP Employee

Hi Joshua,

Yes, the MK20DX256VLL10 support the Program Partition command (0x80).

And I'd like to suggest that you can utilize the standard software driver which provides particular function to execute the command and the C90TFS Flash Driver's link is below.

cache.nxp.com/files/microcontrollers/software/device_drivers/C90TFS-FLASH-DRIVER-DEVD.exe?fsrch=1&sr=3&pageNum=1


Have a great day,
Ping

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jeremyzhou
NXP Employee
NXP Employee

Hi Joshua,

After confirmed with the doc team, the K20P100M100SF2V2RM actually has missed the Program Partition command.

And I'd like to know what is going on about the issue now.

Have a great day,
Ping

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xenoamor
Contributor I

Hi Ping,

Does this mean this device does have a Program Partition command and it's not listed or that the device doesn't have a Program Partition command?

If it does what's the hexadecimal value for it and if it's 0x80 why am I receiving an ACCERR error

Many thanks,
Joshua

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jeremyzhou
NXP Employee
NXP Employee

Hi Joshua,

Thanks for your sharing.

And I'll contact with the AE about the issue and inform you ASAP if we work it out.

Have a great day,
Ping

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