We have been developing our product with iMX7D.
I hope to connect a LPDDR2 to the iMX7D.
In Reference Manual IMX6SDLRM Rev. 2 , 45.4.5 LPDDR2 and DDR3 pin mux mapping,
it is described that the LPDDR2 and DRAM pin mux mapping for iMX6.
But , in the iMX7D Reference Manual the LPDDR2 and DRAM pin mux mapping is not defined.
Could you teach me the LPDDR2 pin mux mapping for iMX7 ?
Or ,as DRAM I/O pad name and LPDDR2 functionality is consistent ,
Is the pin mux mapping unnecessary ?