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Event ID registers (PMECID0/1) in iMX6 QuadPlus PMU read all 0s.

Question asked by Taran Tirpathi on Aug 17, 2016

for IMX6 Quad Plus when I read the Event ID registers (PMCEID0 and PMCEID1), they are all 0s. This means that no events are implemented.

I am able to enable the Performance Cycle Counter and read back, the counter and it is counting.

 

My setup is:

1. Set SUNIDEN, SUIDEN bits in SDER register. Reference Getting zeros on i.MX6 PMU counters

2. Set EN bit in PMUSERENR register.

3. Disable all counters, set PMCNTENCLR register to 0xFFFFFFFF.

4. Read event ID 0 and event id 1 register. Print here shows value as all 0s.

 

I have my standalone application that I load on the uboot prompt and then execute it. I am using Boundary device's Nitrogen board (NIT6QP MAX).

 

I am on boot core and have configured counter 0 to count event 0x1D (Bus cycles) and counter 1 to count event 0x19 (Bus Access) . I can enable the two counters and read back of the PMCNTENSET register ( val=0x80000003) indicates that both counter 0, 1 and the cycle counters were enabled.

 

Code Snippet:

 

/* Set SUNIDEN and SUIDEN in SDER */

unsigned int val =  0x3;

asm("isb sy");

asm("MCR p15, 0, %0, c1, c1, 1" : :"r"(val));

 

/* set PMUSERENR.EN*/

val = 0x1;

asm("isb sy");

asm("MCR p15, 0, %0, c9, c14, 0" : :"r"(val));

 

/* Disable all counters*/

val = 0xFFFFFFFF;

asm("isb sy");

asm("MCR p15, 0, %0, c9, c12, 2" : :"r"(val));

 

/* Set PMCR*/

val = 0x7;

asm("isb sy");

asm("MCR p15, 0, %0, c9, c12, 0" : :"r"(val));

 

/* Enable Cycle Counter*/

val = 0x80000000;

asm("isb sy");

asm("MCR p15, 0, %0, c9, c12, 1" : :"r"(val));

 

/*Read PMCEID0*/

asm("MRC p15, 0, %0, c9, c12, 6" :"=r" (val));

printf("\nEvent ID 0: 0x%08X\n", val);

asm("MCR p15, 0, %0, c9, c12, 7" :"=r" (val));

printf("\nEvent ID 1: 0x%08X\n", val);

 

What am I missing here? Why does the Event ID registers read 0?

 

Thanks in advance.

 

Regards,

Taran

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