Have a great day,
I suppose the MPC8247 is the only bus device in the system. I.e. it operates in single-MPC8247 bus mode, when the MPC8247 internal memory controller controls all devices on the external pins. As I can see IDT7026 looks like static ram with byte select signals which should be assigned during write and read. The GPCM cannot do that. So you should use UPM. Let we use bank n of the MPC8247 memory controller. Select UPM for the bank n. In this case you can connect MPC8247 and IDT7026 in the next way:
MPC8247 – IDT7026
PCSn – CE
A[27:30] – A[0:13]
PBS[0:1] – UB,LB and D[0:15] – IO[15:0] (or
PBS[0:1] – LB, UB and D[0:15] – IO[0:15], check do you need byte swap with the second port)
PGPL1 – R/W
PGPL2 – OE
I do not see suitable solution for testing the IDT7026 BUSY signal by the MPC8247. Possibly you can use another the MPC8247 memory controller bank m for access to the IDT7026 semaphores (i.e. connect PCSm to the SEM input). Using semaphores in the software you can avoid simultaneous access to the same memory cell by left and right port.
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