Configuring MIPI sensor

[aliismail]

Hi everyone,

I want to configure my scm qwks board to capture video from a ADV7281 Analog Devices dev board. I know I need to configure the imx6 to recognize this device. I am not sure where to start modifying the device trees for a mipi sensor. I have gone through many threads and the following debug checklist document.

https://community.nxp.com/docs/DOC-94312

First step is to check that GPIO/IOMUX settings are correct. What document must I reference to set these settings accordingly?

Thanks!

[igorpadykov]

Hi Ali

iomux settings means IOMUXC_GPR1[MIPI_IPU_MUX]

also one can look at

https://ez.analog.com/thread/50046

https://community.nxp.com/message/314760#comment-314760

kernel mainline the driver already supports ADV7181 MIPI interface:

http://lxr.free-electrons.com/source/drivers/media/i2c/adv7180.c

Best regards

igor

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[aliismail]

Hi Igor,

So I am at a point where I think I have everything configured. I am trying to configure VC2 to CSI0 in IPU2.

In imx6dql.dtsi the mipi/csi interface is defined.

mipi_csi: mipi_csi@021dc000 { /* MIPI-CSI */

                                compatible = "fsl,imx6q-mipi-csi2";

                                reg = <0x021dc000 0x4000>;

                                interrupts = <0 100 0x04>, <0 101 0x04>;

                                clocks = <&clks IMX6QDL_CLK_HSI_TX>,

                                         <&clks IMX6QDL_CLK_EMI_SEL>,

                                         <&clks IMX6QDL_CLK_VIDEO_27M>;

                                clock-names = "dphy_clk", "pixel_clk", "cfg_clk";

                                status = "disable";

                        };

In imx6dqscm_qwks_rev2.dts the mipi/csi is configured with IPU2(ipu_id = 1), CSI0(csi_id = 0), VC2 (v_channel=2) and 1 lane.

&mipi_csi {

        status = "okay";

        ipu_id = <1>;

        csi_id = <0>;

        v_channel = <2>;

        lanes = <1>;

};

IPU2 is also defined and configured already in imx6qdl.dtsi. My issue is that when I read memory address 0x021dc004 (MIPI_CSI_N_LANES) I get 0x00000003, which means there are 4 active data lanes. After looking at the rest of the registers, everything is in reset. Any hints on why everything is in reset and/or what I have to configure to get it out of reset?