I want to make custom board and divert a SDP's schematic as much as possible.
Also I want to minimize the number of components.
So if there are unnecessary components, I will remove it.
Please let me know the following questions.
1. Which bulk capacitor is better to connect VDDHIGH_CAP and NVCC_PLL_OUT ?
Following recommendation is in design checklist.
Only one 10 μF bulk capacitor should be connected to each of these on-chip LDO regulator outputs: VDDHIGH_CAP/NVCC_PLL_OUT/VDDUSB_CAP.Decoupling capacitors such as 0.1 μF or 0.22 μF should also be used.
But VDDHIGH_CAP/NVCC_PLL_OUT is connected to 22μF bulk capacitor in SPF-27417_C4.pdf.
Which is better, 10μF or 22μF ?
Also please tell the reason why SDP use 22μF.
2. Can we remove diode D10 ?
Following note is in schematic.
Diode D10 is required to correct a problem on a small number of i.MX6 DualLite parts in which VDDSNVS does
not come up when VDDHIGH_IN is applied. A similar problem was corrected on i.MX6Q TO1.2 processors. The
diode is left populated for similarity across the Smart Device family of boards.
In my understanding, diode D10 need only for when using silicon revision 1.2.
So we can remove the diode D10 when we use rev 1.3. Is my understanding correct ?
3. What is the funciton of C504 capacitor ?
In P21 of SPF-27417_C4.pdf, WDOG_B is connected to 2.2μF capacitor.
What the purpose of it ?
4. Must user use 6.04kOhm 1% resistor for DSI_REXT and CSI_REXT ?
In Table 2-13 of hardware design guide, NXP recommend to connect to 6.04kOhm 1% resistor for DSI_REXT and CSI_REXT.
Must user use 6.04kOhm 1% resistor for DSI_REXT and CSI_REXT ?
Can I use other value and accuracy resisitor such as 10KOhm 5% ?
I want to use same components as much as possible.
Add info: I plan to use CSI and DSI.
5. Why do you use 2.3KOhm for I2C ?
Why did you choise 2.3KOhm for I2C ?
The resistor value is depends on user's board sinal integrity.
Is my understanding correct ?