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SPI Mux - non gpio cs

Question asked by matthew montoya on Aug 9, 2016
Latest reply on Aug 10, 2016 by igorpadykov

Hello all,

 

Im trying to set up a device tree for some custom hardware and had a mux question regarding SPI.

 

Ive looked at the imx6qdl-nitrogen6_max.dtsi as part of the boundary 3.14 linux release. The spi chipselects in the nitrogen and sabre boards are all tied to GPIO's however our spi CS isnt done using gpio. For example Spi 1's ss0 is on pin disp0_data23.

 

The current device tree sets spi CS up as:

 

fsl,spi-num-chiselects = <1>   (this should be ok for ours as well)

cs-gpios = GP_ECSPI1_NOR_CS

where

GP_ECSPI1_NOR_CS is a #define pointing to a gpio bank and pin.

 

If were using the disp0 line for the ss0 do i just define it as:

MX6QDL_PAD_DISP0_DAT23_ECSPI1_SSO   0x100b1

following the same pattern as the other muxes and get rid of the cs-gpios = ... line or is it done differently?

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