The SerDes1_PLL1 and SerDes1_PLL2 are not locking on our T2081 board.
We have selected SRDS_PRTCL_S1 = 0xAA
We supply the 100MHz clock differential to SD1_REF_CLK1 and SD1_REF_CLK2
with clean clock. (no jitter)
We have UBOOT up and running, so we are able to Read/Write PLLnRSTCTL registers and
we have following values :
SerDes1_PLL1RSTCTL = 0x264745A7
SerDes1_PLL2RSTCTL = 0x06474520
Find attached our RCW image used.
Original Attachment has been moved to: ifc1211_rcw_aa_1200MHz.bin.zip