I am using the P3041 with the processor acting as the SRIO host for both SRIO ports (1 & 2).
When I get a Packet Response TImeout (PRT set in the LTLEDCSR register), I get an interrupt as expected... but the EPWISR register does not consistently indicate the correct SRIO port which caused the interrupt. It does (at least from the testing I have done) always have at least one port bit set as the source of the interrupt, but the port indicated is often not the port which actually caused the packet response timeout.
There appears to be no way to determine which port caused the interrupt in this case if both ports are are connected to devices with the same device ID and the ADIDCSR is not set differently between the two ports on the host.
Is there any way for the EPWISR register to indicate the port which caused the interrupt for a PRT?