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i.MX50 Cortex-A8 L2 Cache " "Write combining disable""

Question asked by Nori Shinozaki on Aug 1, 2016
Latest reply on Aug 25, 2016 by Victor Linnik

Hello Champs,

 

I got unhandled exception error running my RTOS on i.MX502.

 

In i.MX502 Cortex-A8 cp15 c9 "L2 Cache Auxiliary Control Register",

bit25 is "Write combining disable".

 

 

The default is "0 = enables write combine, default"

 

Is there any case this default setting can cause unhandled exceptions?

 

BR,

N.Shinozaki

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