i.MX50 Cortex-A8 L2 Cache " "Write combining disable""

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i.MX50 Cortex-A8 L2 Cache " "Write combining disable""

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norishinozaki
Contributor V

Hello Champs,

I got unhandled exception error running my RTOS on i.MX502.

In i.MX502 Cortex-A8 cp15 c9 "L2 Cache Auxiliary Control Register",

bit25 is "Write combining disable".

The default is "0 = enables write combine, default"

Is there any case this default setting can cause unhandled exceptions?

BR,

N.Shinozaki

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b36401
NXP Employee
NXP Employee

No. Everything should be fine with default settings of cache.

Have a great day,
Victor

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