Salve,
volevo solo sapere come è supportata l' interfaccia MII sul processore iMX6UL. Dal reference manual
e dal datasheet sembra che sia supportata ma non riesco a trovare traccia di come sono mappati i pin ENETx_RX_DATA2.3 e ENETx_TX_DATA2.3.
Qualcuno può aiutarmi al riguardo?
Saluti
Pietro Centoletti
Solved! Go to Solution.
Hi Pietro
please look at Table 22-1. ENET1 External Signals and Chapter 4 External Signals
and Pin Multiplexing p.183 i.MX6UL Reference Manual
http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6ULRM.pdf
Best regards
igor
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Hi Igor,
thanks a lot for the quick answer. I was not able to get this information before
Best regards
Pietro
Hi Pietro
please look at Table 22-1. ENET1 External Signals and Chapter 4 External Signals
and Pin Multiplexing p.183 i.MX6UL Reference Manual
http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6ULRM.pdf
Best regards
igor
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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