We are presently working on Renesas's RL78/F14 microcontroller, the application is BLDC motor controller, from Renesas we have received the list of self Diagnostic failsafes like listed below.
1. CRC checking in flash-memory
2. ECC checking for RAM
3. Checking the stack pointer overflow, underflow
4. Monitoring the system clock oscillation state
5. Protecting the RAM data re-writing in case of CPU crash
6. Protecting the SFR re-writing in case of CPU crash
7. Detection of improper memory・access
8. Clock frequency detection judgment
9. A/D conversion test
10. Port digital output signal level detection judgment of
Now we are interested to use the S12 magniV controller and implement self Diagnostic failsafes.
I have two question
1. Do the S12 magniV controller has the self Diagnostic failsafe simillar to RL78/F14 as listed above?
2. If not can you provide the algorithm for the implementation of above Diagnostic feature in your controller
We got one document from your website for understanding.
Also attaching the RL78/F14 safety document where the above listed Diagnostic failsafes are explained in details.
Request your help!!