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ls1021atwr: secure access to SMMU register from PL0

Question asked by Vincent Siles on Jul 28, 2016
Latest reply on Jul 28, 2016 by Vincent Siles


I'm trying to write a userland driver for my µkernel (secure kernel running in Secure PL1, driver running in Secure PL0) to control the SMMUs. In the reference manual, I don't see any bit in the CSU_CSL to allow RW access to Secure/User.

1) Is it possible to control the SMMU from PL0 on this board ?

2) If it is, how do I achieve that ?