Hi Sreekanth,
We guarantee that RAM content stays unaffected until the Power On Reset Assert voltage level is not reached. That level is not exactly specified (and it cannot be externally measured), but it typically refers to approximately 1.1V~1.2V at VDDX line.
The Low Voltage Reset monitor is not active during (Pseudo) Stop mode. So, the VDDX voltage could fall even below 2V when MCU is in the (Pseudo) Stop mode without any effect on RAM data integrity. Of course, any MCU wake-up at that low voltage level will probably cause a Low Voltage Reset (but RAM data are not affected).
I hope it helps you.
Have a great day,
Radek
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