ls1021a: error executing sha256 job descriptor

[vsiles]

Hi,

I'm trying to use the SEC of my ls1021atwr to compute a sha256. I'm using 32 bit pointers and no additional word inthe output ring buffer (only 2 words). Here is the scatter-gather table I use:

1 entry at 0xbff00c38:
- address: 0xbff0005c
- size (+ F flag): 0x40000400

Here are the descriptors I built:

HEADER (6 descriptors): 0xb0800006
OPERATION (sha256): 0x8443000d
FIFOLOAD (scatter gather): 0x25140400
INPUT ADDR: 0xbff00c38
STORE: 0x54200020
OUTPUT ADDR: 0xbff00e38

Job Ring 0 is configured (irba, orba, irs, ors are set and the job ring is started).

Before adding the job, all slots are available, SEC status is 0x206 (IDLE) and JR0 output status is 0

When I add the job to JR0, I see that input index and ouput index are correctly incremented, FAR*/MAF* registers are 0,

I can see there is a job in the output queue (orsf register), and the output status is now 0x40001f04. I can see the descriptor address in the input ring, but my output ring (pointed by orba) is still empty (0 everywhere, both jd and status word). Also, SEC status is now 0x205 (no longer IDLE)

1) Is it normal to have the outpu ring full of 0 but the output satus different from 0

2) I don't understand the output status, according to the doc is means DECO error, invliad descriptor comand #31 but I only have 6 commands

Am I missing someting ? Did I do somehting wrong ?

Best,

V.

[vsiles]

It looks like my smmu is not configured correctly. My code is executing in the secure world, from secure ram (with tzasc enabled), and smmu3 configured so that SEC has access to secure ram. I'm still missing a piece of the puzzle.

[vsiles]

My driver is in secure PL0 (user mode) and doesn't seem to have access to the SMMU3 component, to correctly configure it. While reading the doc for the CSU in order to enable Secure/User RW access to the SMMU, I noticed there are no such entries in the CSL array (refmanual ~ page 440).

Is there a way to allow access to the SMMU from User Mode ?

[vsiles · Accepted solution]

Ok, the problem (see TRM of MMU400) is that MMU can't be access in User Mode (PL0) so I can't have a driver in userland, I'll have to provide a proper kernel driver. As soon as the SMMU is correctly configured by the kernel, my SEC computation works flawlessly.