The ROM expects the QuadSPI configuration parameters (as explained in the QuadSPI
Configuration Parameters) to be present in the serial flash memory from the offset 0x400
of serial flash of length 368 bytes. The ROM reads these configuration parameters using
the default read command configured in the LUT of the QuadSPI interface with the
SCLOCK operating at 18 MHz.
(IMX6SXRM.pdf - page 408)
My system is based on I.MX6SX.
I set BOOT_CFG1[7:4] to 0001 and BOOT_CFG1[3] to 0, so expected QSPI1 SCLK 18MHz, but there is no signal on the pin.
Is there another requirement for QSPI booting?
Solved! Go to Solution.
Hi JHY
this should be sufficient, one can check clocks: both 24MHz and
32.768KHz, BOOT_CFG4[7] - infinite loop,
then attach jtag check boot configuration in registers
SRC_SBMR1,2.
Best regards
igor
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If you set BOOT_CFG1[3] to 0, you choose QuadSPI0. If you want to use QuadSPI1, you have to set BOOT_CFG1[3] to 1.
IMX6SXRM.pdf - page 311
Hi JHY
this should be sufficient, one can check clocks: both 24MHz and
32.768KHz, BOOT_CFG4[7] - infinite loop,
then attach jtag check boot configuration in registers
SRC_SBMR1,2.
Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
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