I have a custom board with T2080RDB as reference which is booting UBoot (with CONFIG_MP disabled) from NAND. Once uboot boots up on core 0, all other cores are in boot hold-off state. I have loaded vxWorks bootrom image (with SMP support) on to DDR and it works fine on Core 0. Now i want to boot the remaining cores from the same vxWorks bootrom image loaded in DDR, is it possible to do so?
I changed Boot Space Translation Register values to point to vxWorks bootrom image address in DDR, but that didn't help me out. All other cores didn't boot.
Can anyone please clarify me what does the address 0x0_FFFF_Fnnn mean in section 4.3.3 Boot Space Translation of T2080RM Rev 0, 11/2014?
Thanks in advance for all your help...