AnsweredAssumed Answered

TWR-LS1021A-PB QSPI access from SDK 2.0 U-Boot

Question asked by Kees Trommel on Jul 21, 2016
Latest reply on Jul 22, 2016 by Kees Trommel

I am trying to access the QSPI-NOR of the TWR-LS1021A-PB board (with a revision 2 silicon) using the sdcard-qspi u-boot build from the QorIQ SDK 2.0. When after booting from the SD card the u-boot command "sf probe" gives the following output:

 

U-Boot 2016.012.0+ga9b437f (Jul 21 2016 - 11:38:15 +0200)

 

CPU:   Freescale LayerScape LS1021E, Version: 2.0, (0x87081120)

Clock Configuration:

       CPU0(ARMV7):1000 MHz,

       Bus:300  MHz, DDR:800  MHz (1600 MT/s data rate),

Reset Configuration Word (RCW):

       00000000: 0608000a 00000000 00000000 00000000

       00000010: 70000000 00007900 e0025a00 21046000

       00000020: 00000000 00000000 00000000 20000000

       00000030: 00080000 881b7340 00000000 00000000

I2C:   ready

Model: LS1021A TWR Board

Board: LS1021ATWR

DRAM:  1 GiB

Using SERDES1 Protocol: 112 (0x70)

MMC:   FSL_SDHC: 0

EEPROM: NXID v16777216

PCIe1: Root Complex no link, regs @ 0x3400000

PCIe2: Root Complex no link, regs @ 0x3500000

In:    serial

Out:   serial

Err:   serial

SEC0: RNG instantiated

SATA link 0 timeout.

AHCI 0001.0300 1 slots 1 ports ? Gbps 0x1 impl SATA mode

flags: 64bit ncq pm clo only pmp fbss pio slum part ccc

Found 0 device(s).

SCSI:  Net:   eTSEC2 is in sgmii mode.

eTSEC1 [PRIME], eTSEC2, eTSEC3

=> sf probe

SF: Unsupported flash IDs: manuf 00, jedec 0000, ext_jedec 0000

Failed to initialize SPI flash at 0:0 (error -22)

 

I am using the following DIP switch settings:

 

SW2[1:8] = 00100111

SW3[1:8] = 01100101

 

After enabling debugging in the fsl_qspi.c driver and adding the following printf I get the following output:

 

int qspi_xfer(struct fsl_qspi_priv *priv, unsigned int bitlen,

        const void *dout, void *din, unsigned long flags)

{

    u32 bytes = DIV_ROUND_UP(bitlen, 8);

    static u32 wr_sfaddr;

    u32 txbuf;

    printf("qspi_xfer:\nbitlen=0x%08x\nflags=0x%08x\nbus_clk=0x%08x\ncur_seqid=0x%08x\nspeed_hz=0x%08x\nsf_addr=0x%08x\nflash_num=0x%08x\nnum_chipselect=0x%08x\n",

               bitlen, flags, priv->bus_clk, priv->cur_seqid, priv->speed_hz, priv->sf_addr, priv->flash_num, priv->num_chipselect);

    if (dout) {

 

 

=> sf probe

fsl_qspi_ofdata_to_platdata: regs=<0x1550000> <0x40000000, 0x4000000>, max-frequency=50000000, endianess=be

qspi_xfer:

bitlen=0x00000008

flags=0x00000001

bus_clk=0x00000000

cur_seqid=0x00000000

speed_hz=0x02faf080

sf_addr=0x00000000

flash_num=0x00000001

num_chipselect=0x00000002

qspi_xfer:

bitlen=0x00000028

flags=0x00000002

bus_clk=0x00000000

cur_seqid=0x0000009f

speed_hz=0x02faf080

sf_addr=0x00000000

flash_num=0x00000001

num_chipselect=0x00000002

SF: Unsupported flash IDs: manuf 00, jedec 0000, ext_jedec 0000

Failed to initialize SPI flash at 0:0 (error -22)

 

Do I miss a configuration or does the SDK 2.0 have a known bug that can explain this behavior?

Outcomes