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Question, i.MX6SL internal PLL use

Question asked by AVNET JAPAN FAE (team share account) on Jul 18, 2016
Latest reply on Sep 1, 2016 by igorpadykov

Dear team,

 

My customer is trying to reduce the power dissipation of i.MX6SL by configuring CCM_ANALOG_PLL_SYS/BYPASS[16Bit] as the situation demands of their application.

When they set the internal PLL of i.MX6SL into bypassed, the power dissipation can be reduced.

The issue is;

When they switch the CCM_ANALOG_PLL_SYS/BYPASS[16Bit], memory access error (data abort or pre-fetch abort) could occur on their board.

They believes that the issue is caused because the switching the bit can affect the DDR clock.

Correct?

If you have any ideas to avoid such problems, please let me know.

 

Thanks,

Miyamoto

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