Does it need to manage cache manually when use rapidIo?
As we know, in the rapidIO protocol, only GSM operations are required to keep cache coherent.
Then in the NREAD/NWRITE/MAINTENANCE read, does it need to manage cache manually, for example,
if I NWRITE some data from CPUA's memory to CPUB's memory through rapidio link, when read data from
CPUB side, does it need to invalidate cache before read? or in the CPUB side, it will maintain cache automatically,
no need to invalidate cache before read?