I was testing internal SRAM on a MPC567xK when the EBI stopped working:
There is 96KB of ramtest SRAM at 0x40021A00, and this error only occurs after a march12 memory test (bother reads and writes to ram) on ramtest.
The error, an IVOR1trap, only occurs on reading from EBI after the test on ramtest.
MCSR is 0x0008800C
BUS_WRERR is also set
MCSSR0 is the last of the following:
MCSRR1 is 0x00008000
Here are the rest of my EBI settings:
Why does this IVOR1trap only happen after the test on ramtest SRAM? I don't understand how reading and writing to SRAM is changing the behavior of the EBI bus read.