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EBI Bus error causing IVOR1trap, but only after SRAM write

Question asked by Laura Yindra on Jul 11, 2016
Latest reply on Jul 12, 2016 by Laura Yindra

I was testing internal SRAM on a MPC567xK when the EBI stopped working:

 

There is 96KB of ramtest SRAM at 0x40021A00, and this error only occurs after a march12 memory test (bother reads and writes to ram) on ramtest.

 

The error, an IVOR1trap, only occurs on reading from EBI after the test on ramtest.

 

MCSR is 0x0008800C

BUS_WRERR is also set

MCSSR0 is  the last of the following:

    e_lis           r8,0x30000

    e_add16i   r3,r8,0x1408

    se_lwz       r3,0x0(r3)

    se_lhz        r31,0x4(r3)

MCSRR1 is 0x00008000

 

Here are the rest of my EBI settings:

MCR: 0x06000004

BMCR: 0x00001980

BR0: 0x20000827

OR0: 0xFFB00000

 

Why does this IVOR1trap only happen after the test on ramtest SRAM?  I don't understand how reading and writing to SRAM is changing the behavior of the EBI bus read.

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