Does the DDR controller in T1042 support BIST? Can this be invoked from code running in SRAM?

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Does the DDR controller in T1042 support BIST? Can this be invoked from code running in SRAM?

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adharuma
Contributor I

We would like to run BIST on our DDR3 early in the boot cycle from SRAM. Does the DDR controller in T1042 support BIST?

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ufedor
NXP Employee
NXP Employee

The T1040 DDR controller has means for automatic memory testing.

Please refer to the QorIQ T1040 Reference Manual, 14.4.59 DDR Memory Test Control Register (DDR_DDR_MTCR) and next sections.

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