We are currently working on BT.1120 input of the CSI, but we have some issues.
The video comes from a FPGA, 8bits for Y, 8bits for CbCr, total 16bits, one clock : Pixclk.
The SAV and EAV are embedded, progressive mode, single data rate.
We connected C0~C7 to IPU1_CSI1_DATA2~9 and Y0~Y7 to IPU1_CSI1_DATA12~19.
In the device tree, all this pins are set to 0xb0b1, the VSYNC, HSYNC,DATA0,1,10,11 are set to PAD_CTRL_HYS_PD
We created a driver, and communicate to V4l2 driver .
This is our configuration :
IF type : V4L2_IF_TYPE_BT1120_PROGRESSIVE_SDRmode : V4L2_IF_TYPE_BT656_MODE_BT_8BIT
pixelformat : V4L2_PIX_FMT_YUYV
bt_sync_correct = 0
nobt_vs_inv = 0
nobt_hs_inv = 0
We dumped some registers :
CSI_SENS_CONF = 0x00000A50
CSI_ACT_FRM_SIZE = 0x0437077F (1920x1080)
CSI_CCIR_CODE_3 = 0x00FF0000
When we launch the driver, we have the following error :
ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0
Is the configuration correct? We found a lot of different patches (sii9135,tvin), and we used it as templates.
Is there any debugging tool for v4l2? A log could be helpful.