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Recommended layout of i.MX6DQ DRAM termination for Fly-by topology.

Question asked by Satoshi Shimoda on Jul 4, 2016
Latest reply on Jul 6, 2016 by Artur Petukhov

Hi community,


Our customer have a question about i.MX6DQ DRAM layout.

They will use 8 chips Fly-by topology for DDR interface.

You know, many termination resistors are needed for Fly-by topology on address, control, command, and clock line.

In this case, would you let me know your recommended layout about termination resistors?

(e.g. place as close as DRAM chip)



Best Regards,

Satoshi Shimoda