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MPC8315E PCIe memory configuration

Question asked by linjie pan on Jul 3, 2016
Latest reply on Jul 3, 2016 by Pavel Chubakov

On physical hardware,PCIe 1 connects with PCI device(BCM56134).

When during scanning pci 1 bus,why It can't detect bcm56134?

It print like this:

 

In fact,Should be printed like this:

 

How to set the PCI configuration space, MEM space and  I/O space?

and Which register are need to set?

Such these Macro definitions,how to set ?

CONFIG_SYS_PCIE1_BASE、CONFIG_SYS_PCIE1_MEM_BASE、CONFIG_SYS_PCIE1_MEM_PHYS、CONFIG_SYS_PCIE1_MEM_SIZE?

CONFIG_SYS_PCIE1_CFG_BASE、CONFIG_SYS_PCIE1_CFG_SIZE?

CONFIG_SYS_PCIE1_IO_BASE、CONFIG_SYS_PCIE1_IO_PHYS、CONFIG_SYS_PCIE1_IO_SIZE?

=================================================================================


/*

* General PCI

* Addresses are mapped 1-1.

*/

#define CONFIG_SYS_PCI_MEM_BASE        0x80000000

#define CONFIG_SYS_PCI_MEM_PHYS CONFIG_SYS_PCI_MEM_BASE

#define CONFIG_SYS_PCI_MEM_SIZE          0x10000000 /* 256M */

#define CONFIG_SYS_PCI_MMIO_BASE       0x90000000

#define CONFIG_SYS_PCI_MMIO_PHYS       CONFIG_SYS_PCI_MMIO_BASE

#define CONFIG_SYS_PCI_MMIO_SIZE         0x10000000 /* 256M */

#define CONFIG_SYS_PCI_IO_BASE             0x00000000

#define CONFIG_SYS_PCI_IO_PHYS             0xE0300000

#define CONFIG_SYS_PCI_IO_SIZE               0x00100000 /* 1M */

 

#define CONFIG_SYS_PCI_SLV_MEM_LOCAL CONFIG_SYS_SDRAM_BASE

#define CONFIG_SYS_PCI_SLV_MEM_BUS 0x00000000

#define CONFIG_SYS_PCI_SLV_MEM_SIZE 0x80000000

 

#define CONFIG_SYS_PCIE1_BASE           0xb0000000

#define CONFIG_SYS_PCIE1_MEM_BASE 0xb0000000

#define CONFIG_SYS_PCIE1_MEM_PHYS 0xb0000000

#define CONFIG_SYS_PCIE1_MEM_SIZE   0x02000000

#define CONFIG_SYS_PCIE1_CFG_BASE 0xe0009000

#define CONFIG_SYS_PCIE1_CFG_SIZE   0x00001000

#define CONFIG_SYS_PCIE1_IO_BASE     0x00000000

#define CONFIG_SYS_PCIE1_IO_PHYS     0xb2000000

#define CONFIG_SYS_PCIE1_IO_SIZE       0x00800000

 

 

#define CONFIG_SYS_PCIE2_BASE            0xb4000000

#define CONFIG_SYS_PCIE2_MEM_BASE  0xb4000000

#define CONFIG_SYS_PCIE2_MEM_PHYS  0xb4000000

#define CONFIG_SYS_PCIE2_MEM_SIZE    0x02000000

#define CONFIG_SYS_PCIE2_CFG_BASE   0xe000a000

#define CONFIG_SYS_PCIE2_CFG_SIZE     0x00001000

#define CONFIG_SYS_PCIE2_IO_BASE       0x00000000

#define CONFIG_SYS_PCIE2_IO_PHYS       0xb6000000

#define CONFIG_SYS_PCIE2_IO_SIZE         0x00800000

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