About UART communication error by using SDMA in i.MX6SDL.

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

About UART communication error by using SDMA in i.MX6SDL.

Jump to solution
695 Views
keitanagashima
Senior Contributor I


Dear All,

Hello. My customer is testing the UART communication by using SDMA script (uart_2_mcu) on their custom board.

BSP: Linux 3.14.28

Case.1 : HIMASK bit = 1 in SDMAARM_INTRMASK register

- The UART communication error occurred.

- The CHNERR bit = 1 in SDMAARM_EVTERR register.

Case.2 :  HIMASK bit = 0 in SDMAARM_INTRMASK register (<-- Linux BSP default setting)

- The UART can communicate correctly!

- The CHNERR bit = 1 in SDMAARM_EVTERR register.

[Question]

Why is "1" set in CHNERR bit of the SDMAARM_EVTERR register on the channel which used by UART communication (uart_2_mcu script)?

What cause does it notify an error?

Linux BSP set the masked for all channels by default. Is it possible to mask the channel error?

(We worried about whether or not it may mask the error.)

Best Regards,

Keita

Labels (3)
0 Kudos
1 Solution
495 Views
Yuri
NXP Employee
NXP Employee

Hello,

  Please look at my comments.

1.

> How judge the "pending" or "being serviced" in i.MX6DL?

> I think that SDMA checks the EP register. 

  Yes.

2.

> Why is it possible to mask the channels in the INTRMASK regardless
> of channel error occurrence?

  This is possible if data loss is not a problem for an application.

Regards,

Yuri.

View solution in original post

0 Kudos
3 Replies
495 Views
Yuri
NXP Employee
NXP Employee

Hello,

  I hope the following helps.

https://community.nxp.com/message/507608#comment-507608

Have a great day,
Yuri

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 Kudos
495 Views
keitanagashima
Senior Contributor I

Hi Yuri,

Thank you for your reply.

> The SDMA has ability to "warn the ARM platform when an incoming DMA request was

>detected and it triggers a channel that is already pending or being serviced." SDMAARM_EVTERR is used for it.

How judge the "pending" or "being serviced" in i.MX6DL?

I think that SDMA checks the EP register.

>If such kind of events are needed to be served / tracked, it is required to unmask (enable) corresponding events

>in SDMAARM_INTRMASK. Generally it is possible to mask (disable) some channels in the INTRMASK - in order
>to skip possible overflow of data for some active channel.

I couldn't understand well.

You said "Generally it is possible to mask (disable) some channels in the INTRMASK - in order to skip possible overflow of data for some active channel."

Why is it possible to mask the channels in the INTRMASK regardless of channel error occurrence?

Best Regards,

Keita

0 Kudos
496 Views
Yuri
NXP Employee
NXP Employee

Hello,

  Please look at my comments.

1.

> How judge the "pending" or "being serviced" in i.MX6DL?

> I think that SDMA checks the EP register. 

  Yes.

2.

> Why is it possible to mask the channels in the INTRMASK regardless
> of channel error occurrence?

  This is possible if data loss is not a problem for an application.

Regards,

Yuri.

0 Kudos