I do sound recording with the ADC of LPC1549 in burst mode. The sequence includes just one channel.
I just would like to inform the forum that the ADC in LPC1549 needs 26 cycles of the ADC clock for a complete conversion when doing continous sampling.
This is in contradiction with the manual which states that a full 12bit conversion needs 25 cycles!
I observed that the calculated frequency of a sampled sinus is exactly a factor 25/26 lower than expected. Then I counted the cpu cycles for 1024 samples with DWT counter and I confirmed the result.
Dear LPC support, could you please update the manual with this respect?
Perhaps I configured the ADC wrong, so that it needs an extra cycle to restart the conversion after a completion?
Perhaps the same behaviour can be observed in other LPCxxxx ADCs?
Update: I'm using synchronous mode, and I do not use any ADC interupts. The ADC is triggered manually by SW.