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T4240:serdes PCS:How to configure it?

Question asked by carl peng on Jun 20, 2016
Latest reply on Jun 28, 2016 by ufedor

Hello,

I have some confusion on PCS configuration of T4240.

My questions is as below:

1. How to configure PCS of each serdes lane?

    Does configure it through corresponding MAC's MDIO register?

2. lane1 PCS can only be configured by MAC1 according to the below MDIO port mapping?

3. Using MAC9 to configure lane6 of serdes, not using MAC7?

    That is to say, if I choose sg2.3 option, and choose serdes lane 6, I need to use MAC9 to

    configure PCS of serdes lane6, use MAC3 can not configure it?

4. EMI can only access external phy connected with serdes, not used to access PCS of

   serdes?

5. SGMIIACR1[MDEV_PORT] need to configured, can it be all set as 0?

    From the context, when use MAC MDIO to access corresponding PCS, hardware will

   compare the phy addr in the COMMAND with the corresponding MDEV_PORT, then

   decide whether access the PCS, so does this field must be assigned?

 

Thank you!

 

As the T4240RM.pdf said as follow.

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