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MPC5604B  LINFLEX_2 register write error

Question asked by ning li on Jun 20, 2016
Latest reply on Jun 20, 2016 by ning li

Hello, everyone, when I try to use LINFLEX_2 as lin slave, I met some registers write error. I download the example project "LinFlex0 Lin Slave example ",and my test HW is based on SPC560BMLL6.

Problem:

  When I try to write LINFLEX_2.LINCR1.R = 0x2380;

I can see the address 0xFFE48000(LINFLEX_2.LINCR1.R), can not be written in 0x2380,but 0x0390.

I very confused about this. But if I try to write  0xFFE40000(LINFLEX_0.LINCR1.R), it's no error.

 

this is initialization code:

static void InitModesAndClks(void)

{

    ME.MER.R = 0x0000001D;        /* Enable DRUN, RUN0, SAFE, RESET modes */

                                  /* Initialize PLL before turning it on: */

    /* Use 1 of the next 2 lines depending on crystal frequency: */

    CGM.FMPLL_CR.R = 0x02400100; /* 8 MHz xtal: Set PLL0 to 64 MHz */

    /*CGM.FMPLL[0].CR.R = 0x12400100;*//* 40 MHz xtal: Set PLL0 to 64 MHz */

    ME.RUN[0].R = 0x001F0074;       /* RUN0 cfg: 16MHzIRCON,OSC0ON,PLL0ON,syclk=PLL */

    //ME.RUNPC[0].R = 0x00000010;  /* Peri. Cfg. 0 settings: only run in RUN0 mode */

    ME.RUNPC[0].R = 0x000000FE;  // enable peripherals run in all modes

    /* Use the next lines as needed for MPC56xxB/S: */   

    //ME.PCTL[48].R = 0x0000;         /* MPC56xxB LINFlex0: select ME.RUNPC[0] */

    //ME.PCTL[49].R = 0x0000;          // LINFlex[1]:

    ME.PCTL[50].R = 0x0000;          // LINFlex[2]:

    ME.PCTL[68].R = 0x0000;         /* MPC56xxB/S SIUL:  select ME.RUNPC[0] */

    /* Mode Transition to enter RUN0 mode: */

    ME.MCTL.R = 0x40005AF0;         /* Enter RUN0 Mode & Key */

    ME.MCTL.R = 0x4000A50F;         /* Enter RUN0 Mode & Inverted Key */

    while (ME.IS.B.I_MTC != 1) {}    /* Wait for mode transition to complete */ 

    ME.IS.R = 0x00000001;           /* Clear Transition flag */ 

}

static void InitLinFlex2(void)

{

   /* enter INIT mode */

    LINFLEX_2.LINCR1.R = 0x0081; /* SLEEP=0, INIT=1 */

    /* wait for the INIT mode */

    while (0x1000 != (LINFLEX_2.LINSR.R & 0xF000)) {}

  /* configure pads */

    //SIU.PCR[18].R = 0x0604;     /* Configure pad PB2 for AF1 func: LIN0TX */

    //SIU.PCR[19].R = 0x0100;     /* Configure pad PB3 for LIN0RX */

 

    SIU.PCR[40].R = 0x0604;     /* Configure pad PC8 for AF1 func: LIN2TX */

    SIU.PCR[41].R = 0x0100;     /* Configure pad PC9 for LIN2RX */

    /* configure baudrate 19200 */

    /* assuming 64 MHz peripheral set 1 clock */

    LINFLEX_2.LINFBRR.R = 11;//5;

    LINFLEX_2.LINIBRR.R = 416;//208;     

    LINFLEX_2.LINCR2.R = 0x20; /* IOBE=1, Bit error resets LIN state machine *

    LINFLEX_2.LINTCSR.R = 0; /* LIN timeout mode, no idle on timeout */

   LINFLEX_2.BIDR.B.CCS = 0; /* enhanced checksum for LIN Slave */

  LINFLEX_2.IFER.R = 0xF; // enable filters 0-3

  LINFLEX_2.IFMR.R = 0x0; // filters 0 - 3 are in identifier list mode.

  LINFLEX_2.IFCR0.R = 0x1E37; // 8bytes, TX data, ID=0x37, CCS=0

  LINFLEX_2.IFCR1.R = 0x1C35; // 8bytes, RX data, ID=0x35, CCS=0

  LINFLEX_2.IFCR2.R = 0x1F36; // 8bytes, TX data, ID=0x36, CCS=1

  LINFLEX_2.IFCR3.R = 0x1D34; // 8bytes, RX data, ID=0x34, CCS=1

  LINFLEX_2.LINIER.R = 0x7; // enable RX, TX and header interrupt

  LINFLEX_2.LINCR1.R = 0x2380;

}

 

Can anyone help me to solve this problem? Thanks.

Original Attachment has been moved to: MPC5604B-LINFlex-LIN_Slave-CW210.rar

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