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MPC8306 : value of SRR0/SRR1 registers when MCP occurs

Question asked by Marie-Claude Mutschler on Jun 20, 2016
Latest reply on Jun 30, 2016 by alexander.yakovlev

I am working on MCP exception due to TEA signal.

I use a Lauterbach tool in order to break onchip (at 0x200) when a MCP exception occurs and to list the value of SRR0/SRR1 registers

 

When an external interruption occurs during the timeout of ELBC (causing the TEA signal) , I cannot explain the following values of SRR0/SRR1 registers :

  1. SRR0 = 0 and  SRR1=0
  2. SRR0 = 0X0500 and SRR1=0x41000

 

  Is there somebody that has worked on this subject, and could give me an explanation.

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