Content originally posted in LPCWare by dlchnr on Tue Jul 26 02:29:21 MST 2011
I'm working with a LPC11C24 LPCXpresso board and try to understand
the "can_onchip" example.
Now I've a problem to understand the clock generation.
The used CAN_BTR value (0x00001C57UL) and a measurement at
PIO0_1 (CLKOUT) tell me, the LPC11C24 will run with 48MHz.
"SYSPLLCTRL_Val" is defined as 0x00000023 in "system_LPC11xx.h".
The "3" will lead to a MSEL value of 4, which fits to the oscillator input
of 12MHz placed on the board according to the schematic (48MHz / 4 = 12MHz).
But the PSEL value of "2" will result in a post divider ratio P of 4 with a
division ratio of 8 ("division ratio is 2 x P"), which leads to a FCCO
(Frequency of the Current Controlled Oscillator) of 384MHz.
That's out of the 156 to 320 MHz range required!?
Where is error in my chain of thought?