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[PROBLEM]LPC1343 external interrupt on rising edge

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[PROBLEM]LPC1343 external interrupt on rising edge

‎06-15-2016 07:39 PM
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by fantomas2002ro on Tue Jun 26 13:37:14 MST 2012
Hello guys,

I try to catch the rising edge but I didn't succeed. I manage to catch only the LOW level.

After I set the PIN4 of  PORT2 as input the value of the pin was still high. Is this ok?
I try different configuration of the GPIOSetInterrupt, but I didn't manage to catch the HIGH level(rising edge).

void main()
{
    GPIOSetDir(PORT2,4,0);
    GPIOSetInterrupt(PORT2, 4, 0, 0, 1);
    GPIOIntEnable(PORT2, 4);
   
    while(1){}

}

void PIOINT2_IRQHandler(void)
{
     //do something
   bool regVal = 0;
    regVal = GPIOIntStatus(PORT2, 4));
    if(regVal)
    {
        GPIOIntClear(PORT2, 4);
    }
}
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‎06-15-2016 07:40 PM
468 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by researchinnovation on Thu Jun 28 05:07:44 MST 2012
Quote: Polux rsv
Researchinnovation: wrong answer or wrong thread !!!!!!!:rolleyes: :D

Angelo

Hi..!!

My mistake, I accept it.



Thanks & Regards.....:)
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‎06-15-2016 07:40 PM
468 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by researchinnovation on Thu Jun 28 05:06:45 MST 2012
Quote: nkarakotas
Are you a code troll or something?? :p



Code Troll:- A code [I]troll is an executing code,[/I] living within your computer [I]code[/I] that causes mischief when compiling or running the program.Definitely I am not. I am trying to help other as per my knowledge, and I am not the best in the Forum as you are.


Thanks & Regards....:)
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‎06-15-2016 07:40 PM
468 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by nkarakotas on Thu Jun 28 05:01:02 MST 2012
Quote: researchinnovation
Hahahahahahahahaha :)


Are you a code troll or something?? :p
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‎06-15-2016 07:40 PM
468 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by researchinnovation on Thu Jun 28 04:47:17 MST 2012
Quote: kayoda
Seems to be business goal :rolleyes:

Hahahahahahahahaha :)
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‎06-15-2016 07:40 PM
468 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by ex-kayoda on Thu Jun 28 04:15:53 MST 2012
Quote:

Researchinnovation: wrong answer or wrong thread !!!!!!!:rolleyes: :D
Seems to be business goal :rolleyes:

Quote: researchinnovation

__________________
                Irritation At Your Door....!!!            
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‎06-15-2016 07:40 PM
468 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Polux rsv on Thu Jun 28 03:51:08 MST 2012
Researchinnovation: wrong answer or wrong thread !!!!!!!:rolleyes: :D

Angelo
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‎06-15-2016 07:40 PM
468 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by researchinnovation on Thu Jun 28 03:00:15 MST 2012
Quote: fantomas2002ro
Hello guys,

I try to catch the rising edge but I didn't succeed. I manage to catch only the LOW level.

After I set the PIN4 of  PORT2 as input the value of the pin was still high. Is this ok?
I try different configuration of the GPIOSetInterrupt, but I didn't manage to catch the HIGH level(rising edge).

void main()
{
    GPIOSetDir(PORT2,4,0);
    GPIOSetInterrupt(PORT2, 4, 0, 0, 1);
    GPIOIntEnable(PORT2, 4);
   
    while(1){}

}

void PIOINT2_IRQHandler(void)
{
     //do something
   bool regVal = 0;
    regVal = GPIOIntStatus(PORT2, 4));
    if(regVal)
    {
        GPIOIntClear(PORT2, 4);
    }
}


Hi..!!!

[FONT=&quot]      In this mode data is transmitted from master to slave. Before the master transmitter mode can be entered, the I2CONSET register must be initialized as shown in Table. I2EN must be set to 1 to enable the I2C function. If the AA bit is 0, the I2C interface will not acknowledge any address when another device is master of the bus, so it can not enter slave mode. The STA, STO and SI bits must be 0. The SI Bit is cleared by writing 1 to the SIC bit in the I2CONCLR register. [/FONT]
  [B][FONT=&quot]I2CnCONSET used to configure Master mode[/FONT][/B]
          [B][FONT=&quot]Bit[/FONT][/B]
         [B][FONT=&quot]7[/FONT][/B]
         [B][FONT=&quot]6[/FONT][/B]
         [B][FONT=&quot]5[/FONT][/B]
         [B][FONT=&quot]4[/FONT][/B]
         [B][FONT=&quot]3[/FONT][/B]
         [B][FONT=&quot]2[/FONT][/B]
         [B][FONT=&quot]1[/FONT][/B]
         [B][FONT=&quot]0[/FONT][/B]
             [FONT=&quot]Symbol[/FONT]
         [FONT=&quot]-[/FONT]
         [FONT=&quot]I2EN[/FONT]
         [FONT=&quot]STA[/FONT]
         [FONT=&quot]STO[/FONT]
         [FONT=&quot]SI[/FONT]
         [FONT=&quot]AA[/FONT]
         [FONT=&quot]-[/FONT]
         [FONT=&quot]-[/FONT]
             [FONT=&quot]Value[/FONT]
         [FONT=&quot]-[/FONT]
         [FONT=&quot]1[/FONT]
         [FONT=&quot]0[/FONT]
         [FONT=&quot]0[/FONT]
         [FONT=&quot]0[/FONT]
         [FONT=&quot]0[/FONT]
         [FONT=&quot]-[/FONT]
         [FONT=&quot]-[/FONT]
       
 
[LIST]
[*][FONT=&quot]The first byte transmitted contains the slave address      of the receiving device (7 bits) and the data direction bit. In this mode      the data direction bit (R/W) should be 0 which means Write. The first byte      transmitted contains the slave address and Write bit. Data is transmitted      8 bits at a time. After each byte is transmitted, an acknowledge bit is      received. [/FONT]
[*][FONT=&quot]START and STOP conditions are output to indicate the      beginning and the end of a serial transfer. The I2C interface will enter      master transmitter mode when software sets the STA bit. The I2C logic will      send the START condition as soon as the bus is free. [/FONT]
[*][FONT=&quot]After the START condition is transmitted, the SI bit is      set, and the status code in the I2STAT register is 0x08. This status code      is used to vector to a state service routine which will load the slave      address and Write bit to the I2DAT register, and then clear the SI bit. SI      is cleared by writing a 1 to the SIC bit in the I2CONCLR register.[/FONT]
[*][FONT=&quot]The STA bit should be cleared after writing the slave      address. When the slave address and R/W bit have been transmitted and an      acknowledgment bit has been received, the SI bit is set again, and the      possible status codes now are 0x18, 0x20, or 0x38 for the master mode, or      0x68, 0x78, or 0xB0 if the slave mode was enabled (by setting AA to 1).[/FONT]
[/LIST]
  [FONT=&quot][/FONT]
 
  [B][FONT=&quot]Slave Receiver Mode[/FONT][/B]
  [FONT=&quot]       In the slave receiver mode, data bytes are received from a master transmitter. To initialize the slave receiver mode, user write the Slave Address Register (I2ADR) and write the I2C Control Set Register (I2CONSET) as shown in Table
[/FONT]
          [B][FONT=&quot]Bit[/FONT][/B]
         [B][FONT=&quot]7[/FONT][/B]
         [B][FONT=&quot]6[/FONT][/B]
         [B][FONT=&quot]5[/FONT][/B]
         [B][FONT=&quot]4[/FONT][/B]
         [B][FONT=&quot]3[/FONT][/B]
         [B][FONT=&quot]2[/FONT][/B]
         [B][FONT=&quot]1[/FONT][/B]
         [B][FONT=&quot]0[/FONT][/B]
             [FONT=&quot]Symbol[/FONT]
         [FONT=&quot]-[/FONT]
         [FONT=&quot]I2EN[/FONT]
         [FONT=&quot]STA[/FONT]
         [FONT=&quot]STO[/FONT]
         [FONT=&quot]SI[/FONT]
         [FONT=&quot]AA[/FONT]
         [FONT=&quot]-[/FONT]
         [FONT=&quot]-[/FONT]
             [FONT=&quot]Value[/FONT]
         [FONT=&quot]-[/FONT]
         [FONT=&quot]1[/FONT]
         [FONT=&quot]0[/FONT]
         [FONT=&quot]0[/FONT]
         [FONT=&quot]0[/FONT]
         [FONT=&quot]1[/FONT]
         [FONT=&quot]-[/FONT]
         [FONT=&quot]-[/FONT]
       
[LIST]
[*][FONT=&quot]I2EN must be set to 1 to enable the I2C function. AA      bit must be set to 1 to acknowledge its own slave address or the general      call address. The STA, STO and SI bits are set to 0. After I2ADR and      I2CONSET are initialized, the I2C interface waits until it is addressed by      its own address or general address followed by the data direction bit. If      the direction bit is 0 (W), it enters slave receiver mode. If the      direction bit is 1 (R), it enters slave transmitter  mode. After the      address and direction bit have been received, the SI bit is set and a      valid status code can be read from the Status Register (I2STAT).[/FONT]
[/LIST]
 
 
 

Thanks & Regards....:)
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‎06-15-2016 07:39 PM
468 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by fantomas2002ro on Wed Jun 27 08:54:27 MST 2012
it seems that Zero is right. Thank you..
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‎06-15-2016 07:39 PM
468 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Ex-Zero on Tue Jun 26 14:25:41 MST 2012
Yes, if your IOCON_PIO2_4 register MODE setting is still 2 (default), internal weak pullup is enabled :)

So if you've set a rising edge interrupt, pull this pin down and release it to trigger the interrupt ;)
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‎06-15-2016 07:39 PM
468 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by atomicdog on Tue Jun 26 14:10:37 MST 2012
Do you have the internal pull-up or pull-down enabled?
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