LPC43xx: USBCMD_H register read makes system stall...

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LPC43xx: USBCMD_H register read makes system stall...

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by dima2611 on Sun Mar 11 17:16:10 MST 2012
Hi all,

I'm trying to adapt the Mass storage host example from nxpUSBLIB 0.92  for my needs. It used to work before, now the system stalls, debug  connection gets lost as soon as a simple "innocent" read of USBCMD_H  register takes place while configuring EHCI as USB host. I tried  LPCXpresso 4.2 with Red Probe + debugger and IAR6.30 with the native  J-Link. In the later case of IAR the plain source code of nxpUSBLIB was  used (not a precompiled library file)

MCU: LPC4350FET256
           PFM906.04    15
           ESD1148ZRY

LIBRARY: nxpUSBLIB v0.92:
FILE: Drivers/USB/Core/LPC/HCD/EHCI/ehci.c
FUNCTION: static __INLINE HCD_STATUS EHciHostInit(uint8_t HostID)

the following instructions in general could cause troubles:

    EHCI_REG(HostID)->PERIODICLISTBASE = Align4k( (uint32_t)EHCI_FRAME_LIST(HostID) );

    i = EHCI_REG(HostID)->USBCMD_H;
    
    /*---------- USBCMD ----------*/
    EHCI_REG(HostID)->USBCMD_H |=    (EHC_USBCMD_AsynScheduleEnable | EHC_USBCMD_PeriodScheduleEnable |
                                    ((FRAMELIST_SIZE_BITS%4) << 2) | ((FRAMELIST_SIZE_BITS/4) << 15)) ;

    /*---------- CONFIGFLAG ----------*/
    /* LPC18xx doesn't has CONFIGFLAG register */

    /*---------- Power On RhPort ----------*/
    EHCI_REG(HostID)->PORTSC1_H |= EHC_PORTSC_PortPowerControl;
When I cut the whole block, no crash occured. As I stepped in, I could see that the system crashes each time when the value of USBCMD_H is loaded into one of R-registers
LDR.N    R0, <USB0 base> ; 0x40006000
LDR.W    R1, [R0, #0x140]; loading USBCMD_H and overkill
Then, I added a dummy read like [B]i = EHCI_REG(0)->USBCMD_H[/B] to see if I could simulate the crash myself. Unfortunately, yes, I could.

I attach two screenshot in a ZIP file. The second one shows that dummy read (i =...).

BTW, LPC1850 showed exactly the same behavior.
And one important note: If I run this programm from external flash, the behavior is the same - it hangs around that area.

I really hope I got a bad chip or a bad version. J-Link says it is [B]Cortex-M4 r0p1[/B].
Any ideas and hints are appreciated. I need this LPC4350 because of FPU.

/Dima
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by dima2611 on Mon Mar 26 05:23:43 MST 2012
The reason was found.

The USB PHY was disabled when (apparently) accessing its registers.

    /* Turn on the phy */
    LPC_CREG->CREG0 &= ~(1<<5);

Anyway, just wondering why the program did not end up in the HardFault handler.
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