Lpc1769 i2s irq

lpcware · ‎06-15-2016

Content originally posted in LPCWare by furkan.yuksel on Thu Jul 21 05:51:49 MST 2011
Hi,

I'm trying to configure I2S of LPC1769, however, my code is get's into irq nearly all the time. I'm setting debth to 7 and but most of the time while program in irq, debt value seems less than 7.

I'm disabling irq every time program gets in irq service and setting it again just before it goes our irq service. Are there any other flag or something which I forgot to clear? Any ideas on this?

Best Regards,

Furkan

lpcware · ‎06-15-2016

Content originally posted in LPCWare by RA1981 on Wed Aug 03 09:50:27 MST 2011
Hi Furkan,

Quote:
I got through there, so if you need to ask anything about I2C I can try to help ;-)

Thanks. I think the most I want to know is already handled here but I'll ask if I encounter problems ;)

Regards,

Ralf

lpcware · ‎06-15-2016

Content originally posted in LPCWare by furkan.yuksel on Wed Aug 03 02:20:46 MST 2011
Hi Ralf,

I got through there, so if you need to ask anything about I2C I can try to help ;-)

Best Regards,

Furkan

lpcware · ‎06-15-2016

Content originally posted in LPCWare by RA1981 on Mon Aug 01 23:59:37 MST 2011
Hi Furkan,

thank you for the feedback. I'll look into the driver package, but first I have to get I2C up and running :)

Regards,

Ralf

lpcware · ‎06-15-2016

Content originally posted in LPCWare by furkan.yuksel on Mon Aug 01 23:50:42 MST 2011
Hi Ralf, I couldn't writ for a while.

I tried the set IRQs as you offered and it works thank you. I2S is so simple stream protocol so if you be careful about setting its registers, it works very well without problem.
By the way, I'm using I2S drivers inside of mcb1700.code.bundle.lpc1769.lpcxpresso.

lpcware · ‎06-15-2016

Content originally posted in LPCWare by furkan.yuksel on Wed Jul 27 05:25:08 MST 2011
I'm using SGTL5000 codec chip from freescale it has a board which is produced for tower but I'm using it with my LPC1769 and it works. My next step is transmitting sound from air with using nordic NRF24L01+. But for now I couldn' achieve this, I'm only hearing some noise from receiver side. wish me luck on this because it seems like I need some luck :)

Best Regards,

Furkan

lpcware · ‎06-15-2016

Content originally posted in LPCWare by RA1981 on Tue Jul 26 08:01:16 MST 2011

Quote:
I'll give feedback on this and I can try to help if you have any question.

Sounds good ;)
Which codec do you use? On my first try I'll use the UDA1330. I also made some boards with TLV320AIC23, but the UDA1330 should be enough for my first "touch" with I2S.

Regards,

Ralf

lpcware · ‎06-15-2016

Content originally posted in LPCWare by furkan.yuksel on Tue Jul 26 05:53:48 MST 2011
Ok ralf, I'll give feedback on this and I can try to help if you have any question.

Best Regards,

Furkan

lpcware · ‎06-15-2016

Content originally posted in LPCWare by RA1981 on Tue Jul 26 04:39:57 MST 2011

Quote:
Thanks for response...

Glad to help :)

Quote:
... I'll check this soon

Yes, and please give feedback. It would be also of interest for me because I want to start with I2S in the next few weeks.

Regards,

Ralf

lpcware · ‎06-15-2016

Content originally posted in LPCWare by furkan.yuksel on Tue Jul 26 04:15:52 MST 2011
ooh now I got the point:-S I thought that rx and tx were same, both are triggered when FIFO level are blow. But it is mre logical if tx sets irq when it is below some value .

Thanks for response I'll check this soon ;)

Best Regards,

Furkan

lpcware · ‎06-15-2016

Content originally posted in LPCWare by RA1981 on Tue Jul 26 02:04:26 MST 2011

Quote:
I'm enabling IRQs because I want to make all work about I2S in IRQ routine.

Sorry, I missed that you disable the IRQs at the beginning of the ISR.

Quote:
I thought that if FIFO level is below what I set in trigger register, my function shouldn't get into IRQ am I wrong here?

I'm not sure, but I [U]assume [/U]that a [B]master [/B]receiver interrupt is requested when the Rx FIFO count [B]reaches [/B]the Rx trigger level, signalizing that data should be taken from the FIFO. Similarly, a transmitter interrupt is requested when the Tx FIFO count [B]drops below [/B]the Tx trigger level, signalizing that new data is needed.
So, from your code I think you must fill the Tx FIFO and not read from it -> that may cause your interrupts.
According to the IRQ function from the I2S-two-kit example from this package this theory seems to be true...

Regards,

Ralf

lpcware · ‎06-15-2016

Content originally posted in LPCWare by furkan.yuksel on Tue Jul 26 01:12:52 MST 2011
Hi Ralf,

I'm enabling IRQs because I want to make all work about I2S in IRQ routine.

And about FOFOs, that code is just for evaluation so I'm not using data I get form rx FIFO. I'm calling

dat=LPC_I2S->RXFIFO;

just to empty the rx FIFO.

I thought that if FIFO level is below what I set in trigger register, my function shouldn't get into IRQ am I wrong here?

lpcware · ‎06-15-2016

Content originally posted in LPCWare by RA1981 on Mon Jul 25 08:16:35 MST 2011
Hi Furkan,

Quote:
What kind of mistake do I have here?

Hmmm, I'm not sure because I've nothing done with I2S yet but I'll start soon

From a quick read of your code I've two points regarding the IRQ handler:

LPC_I2S->IRQ = 0x00070703;

Why do you always set the FIFO trigger levels and enable the IRQs?

 dat=LPC_I2S->RXFIFO;
...
 dat=LPC_I2S->TXFIFO;

Shouldn't be one of the FIFOs assigned with the dat value? I think you should write into a FIFO buffer. Otherwise I could imagine that the corresponding FIFO will trigger interrupts because it's below the trigger level...

Regards,

Ralf

lpcware · ‎06-15-2016

Content originally posted in LPCWare by furkan.yuksel on Fri Jul 22 23:28:26 MST 2011
First of all, let me explain what my coed does.

I initialize I2S and start it after a small loop I want it to stop. However, when it gets into I2S irq it never goes out.

here part of my main routine:

I2SInit();
I2SStart( );
for (i=0;i<100000;i++);
I2SStop( );

here is my I2S initializatin

void I2SInit( void ) 
{

  /*enable I2S in the PCONP register. I2S is disabled on reset*/
  LPC_SC->PCONP |= (1 << 27);

  /*i2sRX data pini P0[25]*/
  LPC_PINCON->PINSEL1 &= ~(0x3<<18);
  LPC_PINCON->PINSEL1 |= (0x2<<18);
  /*i2sTX CLK P2[11], WS P2[12], data P2[13] */
  LPC_PINCON->PINSEL4 &= ~((0x3<<22) | (0x3<<24) | (0x3<<26));
  LPC_PINCON->PINSEL4 |= ((0x3<<22) | (0x3<<24) | (0x3<<26));
  /*i2sTX MCLK pini P4[29]*/
  LPC_PINCON->PINSEL9 &= ~(0x3<<26);
  LPC_PINCON->PINSEL9 |= (0x1<<26);


  /*72MHz CCKL'dan 18MHz PCLK için 16 bit 16ksps ayarlar&#305;*/
  LPC_I2S->TXRATE = 0xDFF5;        /*Tx_MCLK=8192Hz*/
  LPC_I2S->RXRATE = 0xDFF5;
  LPC_I2S->TXBITRATE = 4;        /*Tx_SCLK=1024kHz (64*FS)*/
  LPC_I2S->RXBITRATE = 4;
  LPC_I2S->TXMODE=0x0008;
  LPC_I2S->RXMODE=0x0006;


  //NVIC_EnableIRQ(I2S_IRQn);
  //LPC_I2S->IRQ = 0x00070700;


  LPC_I2S->DAO = 0X000007C5;
  LPC_I2S->DAI = 0X000007C5;

  I2SStop( );

  return;
}

and here my irq routine which never ends :-S

void I2S_IRQHandler (void)  
{
    int i;
    LPC_I2S->IRQ = 0x00070700;
    uint32_t irqdata=LPC_I2S->STATE;
    int rx_level=(irqdata>>8) & 0xF;
    int tx_level=(irqdata>>16) & 0xF;
    //printf("rx level: %d\n",rx_level);
    //printf("tx level: %d\n",tx_level);
    if (rx_level>4)
    {
    uint32_t dat;
    for (i=0;i<rx_level;i++)
    {
    dat=LPC_I2S->RXFIFO;
    //printf("rx fifo%d: %d\n",i, dat);
    }
    }

    if (tx_level>4)
    {
    uint32_t dat;
    for (i=0;i<tx_level;i++)
    {
    dat=LPC_I2S->TXFIFO;
    //printf("tx fifo%d: %d\n",i, dat);
    }
    }
    LPC_I2S->IRQ = 0x00070703;
  return;
}

What kind of mistake do I have here?

Thanks in advance.

Best Regards,

Furkan

lpcware · ‎06-15-2016

Content originally posted in LPCWare by NXP_Europe on Fri Jul 22 17:15:29 MST 2011
Hello furkan,

can you show us some software?

lpcware · ‎06-15-2016

Content originally posted in LPCWare by furkan.yuksel on Fri Jul 22 01:14:37 MST 2011
Really nobody has ideas on this =(