Seventeen different error messages - is this a record?

[lpcware]

Content originally posted in LPCWare by IanB on Tue Dec 23 13:40:49 MST 2014
Can anyone beat 17 different error messages when trying to get the LPC Link to communicate with a recalcitrant project?

Does anyone have any idea what the problem might have been?

Here they all are:

02: Failed on connect
Invalid emulator index - get list of available emulators.
31: No connection to emulator device

Flash driver "Uninit" return code: 0x0

15: Target error from Commit Flash write
Cannot halt processor
15: Target error from Read register
Cannot access core regs when target running
(crt_emu_lpc11_13_nxp) terminating on communication loss: Pipe has been closed by GDB.

02: Failed on connect
invalid ID for processor
Emu(0) Conn&Reset Was: None, DpID: BB11477. Info: LPCLINK

02: Failed on connect
MEM-AP is not selected
Emu(0) Conn&Reset Was: None, DpID: BB11477. Info: LPCLINK

(crt_emu_lpc11_13_nxp) terminating on communication loss: Pipe has been closed by GDB.

15: Target error from Commit Flash Write
Cannot complete transaction, even after slowing speed
15: Target error from Set break/watch
Unable to set an execution break - no resource available.

15: Target error from Commit Flash write
Cannot halt processor
(crt_emu_lpc11_13_nxp) terminating on communication loss: Pipe has been closed by GDB.

11: Target error from Reset: (null)
15: target error from Register access
Cannot complete transaction, even after slowing speed

Terminate/Disconnect All is not enabled
Reason:
Terminate/Disconnect All is not enabled
To terminate debug sessions, first select a debug session in the Debug View and then select Terminate again

10: Could not start execution from stop
Cannot complete transaction, even after slowing speed

(crt_emu_lpc11_13_nxp) terminating due to loss of debug control

15: Target error from Write register
Cannot complete transaction, even after slowing speed
15: Target error from Set break/watch
Unable to set an execution break - no resource available.

16: Target error from status-Poll
Bad ACK returned from status - wire error.

Failed to execute MU command:
-break-insert -t -f main
Error message from debugger back end:
Could not fetch register "xpsr"; remote failure reply 'E22'
Could not fetch register "xpsr"; remote failure reply 'E22'

Error from StubRegisterDisplayCoreAll: -interpreter-exec console "mon register_display_core
at com.crt.dsfdebug.dsf.commands.MIStubCommandBase.getResult(unknown source)
at com.crt.dsfdebug.dsf.commands.MIStubCommandWrapper.getResult(Unknown Source)
at org.eclipse.cdt.dsf.mi.service.command.AbstractMIControl$RxThread.process
at org.eclipse.cdt.dsf.mi.service.command.AbstractMIControl$RxThread.run

'Interrupt monitor job' has encountered a proble,
An internal error occurred during "Interrupt monitor job".

[lpcware]

Content originally posted in LPCWare by michele_sponchiado_windows on Thu Jun 11 02:16:03 MST 2015
Many thanks IanB,
I'll let you know if and when I'll find a solution, the NXP support guys are following my ticket, many thanks again for your informations!

[lpcware]

Content originally posted in LPCWare by IanB on Wed Jun 10 10:26:16 MST 2015
This is what I found to work best:

NO pull-ups or pulldowns. These are built in to the processor. Pull-downs are a really bad idea as there are pull-ups on the microprocessor pins, and this could end up with the pin biassed at mid-voltage where it will be REALLY prone to noise, and it will make the processor input stage draw current.

A SHORT cable. No more than 300mm, unscreened and loosely tied together with cable ties - this keeps the capacitance down.

A ROBUST connector - I used a Molex Microfit 3.0

On the LPC11xx the RESET connection doesn't do anything.

Ignore the error messages and guess what is wrong - the error messages rarely tell you anything useful. NXP is based in  the Netherlands - If the error messages were in Dutch they would make as much sense to me (though I do know what "slagroom" means)

if it says "Bad ACK returned from status" then you definitely have a bad connection. If it says any of two dozen other error messages then you probably have a bad connection, or you have forgotten to switch the power on to the target board.

[lpcware]

Content originally posted in LPCWare by michele_sponchiado_windows on Wed Jun 10 09:39:33 MST 2015
Hi Ian,
I am facing similar issue with a LPC4357 board and an LPC-Link2 emulator.
I wonder if you ever solved the problems with the emulator connection.
Many thanks!

[lpcware]

Content originally posted in LPCWare by lpcxpresso-support on Mon Jan 26 04:43:00 MST 2015
The Code Red FAQ applies to Code Red products and so is out of date wrt NXP LPCXpresso. It has been replaced by the FAQ on this website.
http://www.lpcware.com/content/faq/lpcxpresso/debug-design

As it says in the FAQ:
   

---

Quote:
We would strongly recommend also including RESET in addition to SWDIO, CLK and GND. For debugging, the tools may try to pull this in certain circumstances (depending upon debug probe, debug configuration settings and tools).

---

[lpcware]

Content originally posted in LPCWare by R2D2 on Sun Jan 25 03:58:51 MST 2015
Former LPCXpresso versions used Reset for LPC11xx, the actual is obviously not using it  :exmark:

I would strongly recommend to connect it and of course to add Reset to your SWD connector.
Reset is required for other LPC-families (at least at the moment) and it's helpful to use a 'Standard' SWD connector for all of them...

If you don't use Reset pin as GPIO use a pull-up to avoid problems...

[lpcware]

Content originally posted in LPCWare by IanB on Sun Jan 25 03:23:42 MST 2015
Could someone please clarify this:

Code Red says:

---

Quote:
We would strongly recommend also including RESET in addition to SWDIO, CLK and GND. For debugging some MCUs, such as NXP LPC11xx, RESET is essential.

---

LPC111x manual says:

---

Quote:
The RESET pin can be left unconnected or be used as a GPIO pin if an external
RESET function is not needed.

---

which is it? Do I need it or don't I?

I'm asking because it's a right pain to connect up - all the way around the other side of the IC from SWCLK and SWDIO.

[lpcware]

Content originally posted in LPCWare by IanB on Tue Jan 20 14:59:48 MST 2015

---

Quote:
Which MCU are you using?

---

LPC1111, LPC1113 and LPC1224 - It says that it needs to be connected but when I monitor it with a scope, I've never seen anything happen.

[lpcware]

Content originally posted in LPCWare by R2D2 on Tue Jan 20 14:28:36 MST 2015

---

Quote: IanB
Does it ever use reset? I've never seen any waveform on it.

---

Which MCU are you using? My LPC11Cxx boards don't use Reset  :)

[lpcware]

Content originally posted in LPCWare by IanB on Tue Jan 20 14:09:14 MST 2015
That's really helpful, and makes sense of it. It's exactly what I thought about pull-downs on SWCLK.

I used telephone cable with two twisted pairs (Z=110Ω) - SWCLK and GND on one and SWDIO and RESET on the other, with 100nF between reset and ground to stop the crosstalk resetting the device. Does it ever use reset? I've never seen any waveform on it.

I still find the interface extraordinarily sensitive to cable length and very small amounts of extra capacitance:
15pF on SWCLK was enough to stop it working. That's adding a delay of only 2 ns. At 3MHz, I would have expected to withstand extra delays of in the order of 100ns before it stopped working.

If I were a betting man, I would wager that the data was being sampled on the wrong edge of the clock.

Microchip uses a similar two-wire interface, and I seem to remember its being a lot more robust (although it did run at a considerably lower speed)

[lpcware]

Content originally posted in LPCWare by lpcxpresso-support on Tue Jan 20 02:35:00 MST 2015
From our board designer:

[list=1]
  [*]The Link2 SWD, JTAG & parallel trace interfaces are all buffered using dual power supply buffers.  The Target side of the buffer is typically powered from the Target VREF when interfacing through J7 or J8.
  [*]J6 on the Link2 board can be used for the SWD interface as long as the VIO_BUF_B is properly powered.  As long as the Target VDDIO is between 2.7 – 3.3V, the easiest way to do this is to shunt JP2 (see below).  A zero ohm resistor can also be installed at R38.

  [img]http://www.lpcware.com/system/files/image002.png[/img]
  [*]The SWD interface is designed to be point to point.  That means on the Link2 board only one SWD interface should be connected.  When J6 is used, do not have any cables installed at J7 or J8.  The same is true on the Target board, so from the SWD connector on the Target board there should be minimal trace stubs branching off the SWDIO and SWCLK signals to the Target MCU.
  [*]When using J7 and J8, the 50 mil pitch ribbon cable with the adjacent gnd wire to SWDIO and SWCLK has approximately a 100ohm characteristic impedance.  On the Link2 board the series terminators (R17 & R18) near U3 driver chip matches this cable impedance.  When buffer U3 drives SWDIO and SWCLK towards the Target the signal sent down the cable is only half the size output by the buffer, but due to a high impedance at the Target end of the cable the signal doubles to full voltage at the Target MCU.  The half size signal reflected back to the source is terminated by the R17 & R18 on the Link2 board.  When SWDIO is driven by the NXP LPCxxxx Target MCU, the buffer in the MCU has slew rate control and an internal impedance that matches 60 to 100 ohm cable pretty well and so no additional series termination is typically needed at the Target MCU.
  [*]When using J6 on the Link2 board with fly wires, especially longer ones like you want to use, it will likely help to use a twisted pair for SWDIO and SWCLK.  Both gnd wires can terminate in to J6-8 on the Link2 board and at gnd on the Target board.
  [*]The long wires you are using will add more capacitance load to the buffer output.  Requiring more power from the buffer to charge / discharge the wire capacitance.   If the Target VDDIO is between 2.7 – 3.3V another possible help is to short SJ1 2-3 (use 0Ω resistor or solder ball).  The resistor between SJ1 1-2 doesn’t need to be removed.  This will eliminate the D4 diode from causing some droop on VIO_BUF_B.  The shunt is still required at JP2.
[img]http://www.lpcware.com/system/files/image004.jpg[/img]
  [*]Not all LPCxxxx chips have an internal pullup or pulldown on the SWCLK pin.  For the chips that do have a pull-up on SWCLK, I suggest using a 10k pullup on the Target board.  If the chip has a pull-up on SWCLK, I would not put a pull-down on the board.  That puts the dc level near the input threshold when the clock is not being driven and this is not recommended.
[/list]

[lpcware]

Content originally posted in LPCWare by IanB on Mon Jan 19 09:04:07 MST 2015

---

Quote:
That was written by a user and not NXP...

---

Is it wrong? My 'scope would say he's correct.

. . . and I'm still hoping for the official explanation of the pull-ups/pull-downs.

[lpcware]

Content originally posted in LPCWare by lpcxpresso-support on Mon Jan 19 07:58:49 MST 2015

---

Quote:
even your own website
http://www.lpcware.com/content/blog/introduction-cortex-serial-wire-debugging-part-one
says that the signal is at V+ when inactive.

---

That was written by a user and not NXP...

[lpcware]

Content originally posted in LPCWare by IanB on Mon Jan 19 05:17:19 MST 2015
Thanks for that information. I started with the simple 4-way pin header, but found that it came off too easily, and my colleagues were experts at connecting it the wrong way round.

I decided to do some more investigation on the SWD connection.

I got my target board working, using a very short cable (150mm), and changed the pull-ups and pull-downs.
Without any resistors, I get either  "no-ACK from Serial Wire" or "target marked as not debuggable"
A stiff pull-up (1k) on SWCLK improves things, but a 1k pull-down leads to the no-ACK error.
This was a little bit of a surprise as SWCLK is mono-directional and driven all the time from the probe.

A stiff pull-up on SWDIO to keep it at V+ during the "turnaround" times would seem like a good idea, but makes little difference.

Adding a terminator (as per lpcxpresso-support, in #1 above) cleared up the overshoot and ringing nicely, but stopped the system working and led to either the no-ACK or the "target marked as not debuggable" error. The terminator was 330Ω in series with 100pF connected from SWCLK to ground (as in Fairchild application note AN-393 "Transmission line effects on High Speed CMOS")

Increasing the wire length to 1m and I was back with the no-ACK error.

An oscilloscope probe on SWCLK often improves things, though I don't see how 10MΩ in parallel with 4pF could possibly make any difference.

So LPCXPRESSO-SUPPORT, let's have your comments; and you still haven't said why SWCLK should have a pull-DOWN - even your own website
http://www.lpcware.com/content/blog/introduction-cortex-serial-wire-debugging-part-one
says that the signal is at V+ when inactive.

[lpcware]

Content originally posted in LPCWare by R2D2 on Wed Jan 14 15:04:15 MST 2015

---

Quote: IanB
...what connector do you put on the other end of those wires?

---

My favorite SWD board connector is a 0.1" 4-pin SMD  :)

[img]http://www.lpcware.com/system/files/Board.JPG[/img]

But we also use 0.05"...

---

Quote: IanB
And how long are the wires?

---

[img]http://www.lpcware.com/system/files/Connector.JPG[/img]

About 45-50cm   :O

[lpcware]

Content originally posted in LPCWare by IanB on Wed Jan 14 14:34:36 MST 2015
Just out of curiosity, R2D2 - what connector do you put on the other end of those wires?
And how long are the wires?

The ribbon cables that are supplied for J7 are just too short - I need enough cable to make sure that the LPClink board is far enough away from any power supply on my pcb, especially the mains side!

[lpcware]

Content originally posted in LPCWare by R2D2 on Wed Jan 14 13:59:54 MST 2015

---

Quote: IanB
This is the J6 I'm talking about - according to the circuit diagram SWDIO/SWCLK/RESET/VSS are brought out on pins 2, 3, 6 and  8 - seems like the ideal connector to use.

---

... that's what we are using since 2009, minimal SWD connection :D

With closed J2 and pull-ups for Reset / ISP_0 / ISP_1 LPC-link2 is working  with all our LPC1xxx boards...

[lpcware]

Content originally posted in LPCWare by IanB on Wed Jan 14 13:33:09 MST 2015
This is the J6 I'm talking about - according to the circuit diagram SWDIO/SWCLK/RESET/VSS are brought out on pins 2, 3, 6 and  8 - seems like the ideal connector to use. (if I used J7 and its ribbon cable the connector on my target side would be on the trackside, UNDERNEATH the board, which means that the board would have to be removed from the product for programming)

Thanks for the link to "J2 confusion" - that explains a lot! I also note that in #7 of lpcxpressolpc114fn28102-questions LabRat says that pull-ups were found to be unnecessary.

Everyone keeps pointing me to the "Design Considerations for Debug" even though they are obviously fallacious.
Why should I connect a pull-up to SWDIO when it already has one?
Why should I connect a pull-down to SWCLK when it will bias the input to half-supply and make it MORE prone to noise pickup, AND make the input circuit draw supply current?

[lpcware]

Content originally posted in LPCWare by R2D2 on Wed Jan 14 09:03:36 MST 2015

---

Quote: TheFallGuy
J6 is the "Cortex 20-pin 0.05" JTAG/SWD/ETM Connector Pinout"

---

Schematic in link above shows:

[color=#f00]J8[/color] is the "Cortex 20-pin 0.05" JTAG/SWD/ETM Connector Pinout

[lpcware]

Content originally posted in LPCWare by TheFallGuy on Wed Jan 14 08:55:15 MST 2015
The pinouts are a standard and they are shown in the FAQ:
http://www.lpcware.com/content/faq/lpcxpresso/debug-design

On LPC-Link2,
J7 is the "Cortex 10-pin 0.05" JTAG/SWD Connector Pinout"
J6 is the "Cortex 20-pin 0.05" JTAG/SWD/ETM Connector Pinout"

[lpcware]

Content originally posted in LPCWare by R2D2 on Wed Jan 14 08:37:39 MST 2015
Did you read #5 of:

http://www.lpcware.com/content/forum/lpcxpressolpc114fn28102-questions

---

Quote:
[color=#f00][u]J2 Confusion:[/u][/color]

J2 is also used to supply VIO_BUF_B. With simple boards (simple SWD connection) this jumper has to be closed, or R38 (1k) has to be added...

---

:O