Pedro Palacios

XEP100 - SPI1 strange data corruption that appears only in the 112pin package.

Discussion created by Pedro Palacios on May 29, 2008
Latest reply on Jun 2, 2008 by Pedro Palacios
Hi, the board I am developing software for has a 5554 and a XEP100 processor.
The MPUS are linked using SPI, 5554 is the master.
A total of 32 16bit words are transmitted periodically in continous transfer mode (the select line is kept asserted during transfers).

In the XEP side, SPI 1 is the module used and it has been routed to Port H.
I am experiencing data corruption in the receiving end. It looks like in some of the words, the module has missed a whole clock period and data appear shifted one or two bits.
For testing purposes, the baud rate has been set to around 50KHz and I have verified that the minimum time between transfers is met. I have also looked at the signal to check the correct data is sent from the master.

Now, this is the interesting thing. If I run the exact same software on an eval board (144 pin package) there is NO data corruption. The problem appears when I run the software on a demo board (112 pin package), I have tried two of these.

The question is:
- Is there any difference between the two packages that could produce such issue?
- Is there any errata that I could have missed?

My next test will be to
- try the same software on SPI1 but without routing to Port H.
- try the same software on SPI0

Any suggestion?