lpcware

SPI in LPC11u24

Discussion created by lpcware Employee on Jun 15, 2016
Content originally posted in LPCWare by Hydraathond on Wed Jun 03 09:09:44 MST 2015
Hi,

So i'm trying to get SPI working on a LPC11u24. I used the example library to write this code, however it doesn't seem to be working.
when I debug this and the code reaches this line
LPC_SYSCON->PRESETCTRL |= (0x1<<0);
the Data Register (DR) changes value from 0x0 to 0x3. and when I try to send any data of my own the DR changes to 0x7 regardless of what data i'm actually writing. (in this case 0xAA).
Furthermore, after the 0xAA line  the RIS register (Raw Interrupt Status) changes, bit RTRIS is set to 1. The datasheet says this happens when the Rx FIFO is not empty.

Does anyone know what i'm doing wrong?
void SetupSPI(void)  
{


LPC_IOCON->PIO0_8 =0x1;// set MISO0 on PIO0.8
LPC_IOCON->PIO0_9 =0x1;// set MOSI0 on PIO0.9
LPC_IOCON->PIO1_29 = 0x1;
LPC_GPIO->DIR[1] = LPC_GPIO->DIR[1] |  (1<<15);//Chip select Config set 1.15 as output
LPC_GPIO->CLR[1] = 15;//Enable CS active LOW

LPC_SYSCON->SYSAHBCLKCTRL |= (0x1<<11);// enable power
LPC_SYSCON->SSP0CLKDIV = 0x2;/* Divided by 2 */
LPC_SYSCON->PRESETCTRL |= (0x1<<0);//SSP0 reset de-asserted.

LPC_SSP0->CR0 = 0x0F07;//Set DSS data to 8-bit, Frame format SPI, CPOL = 0, CPHA = 0, and SCR is 15
LPC_SSP0->CPSR = 96;//SSPCPSR clock prescale register, master mode, minimum divisor is 0x02
LPC_SSP0->CR1 = 0x2;// enable SPI
LPC_SSP0->DR = 0xAA;// TEST DATA
while(1);

}

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