Kristof Geldhof

random PWM generation with timer interrupts - EVM56F8367, CW7.2

Discussion created by Kristof Geldhof on May 28, 2008
Latest reply on Jun 17, 2008 by Pascal Irrle
Hello,

I use the peripheral PWM module on the 56F8367 evaluation board to create edge-aligned PWM waveforms with a period of 100us. This works fine. I also need two channels of the PWM-module to output a 5us pulse, with the rising edge at 30us after the beginning of the PWM period and the falling edge at 35us.

For this purpose I used a timer bean in "Count Mode" and with the option "toggle OFLAG and alternate compare registers". The values of CMPLD1 and CMPLD2 registers correspond to 30us and 5us delay. This works fine as the OFLAG output is the waveform I want. In order to get this output from the PWM channels I defined an interrupt routine "OnCompare" which should be called when the timer reaches its compare values. The routine should then set the (software-controlled) PWM channels high or low.

The timer bean automatically generates the interrupt routine "OnCompare":

#if defined(OnCompare_FAST_INT)
asm void OnCompare(void)
#else
#pragma interrupt
void OnCompare(void)
#endif
{
  /* Write your interrupt code here ... */
}
#if defined(OnCompare_FAST_INT)
  frtid;
  nop;
  nop;
#endif

In this routine I wrote following code:

static int k=0;
// clear timer compare interrupt flags
clrRegBit(TMRC0_SCR,TCF);
clrRegBits(TMRC0_COMSCR,TMRC0_COMSCR_TCF1_MASK|TMRC0_COMSCR_TCF1_MASK);
k=1-k;
if (k==1)    // rising edge of pulse
  {
    // turn on PWM channels 4 and 5
setRegBits(PWMA_PMOUT,PWMA_PMOUT_OUT4_MASK|PWMA_PMOUT_OUT5_MASK);
  }
  else
  {
   // turn off PWM channels 4 and 5
clrRegBits(PWMA_PMOUT,PWMA_PMOUT_OUT4_MASK|PWMA_PMOUT_OUT5_MASK);
  }

However, I see no output at the PWM channels. I also notice that other interrupt routines in my project (like the ADC-OnEnd ISR, Periodic Timer ISR, ...) are not executed anymore! How come?

Outcomes