LPC1111 "JTAG" Signals

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by richas on Wed Feb 17 15:19:00 MST 2010
I am trying to specify the JTAG pinout for our layout guy for the LPC1111 in QFN.  First a basic question, this debug interface is commonly referred to as a "JTAG" interface yet, the more I look at it the more it looks like something called "SWD".  I am used to the ARM7 devices with a more typical JTAG interface.  Maybe someone can clear that up for me.

I am using a 2x5 male header as found on the LPC-Link board.  I have it pinned out as follows:
1  3.3V
2  pin 22 (tms)
3  gnd
4  pin 19 (tck)
5  gnd
6  pin 23 (tdo)
7 nc
8  pin 21 (tdi)
9  gnd
10  pin 2 (reset)

Perhaps someone has done this and could verify my connections.