Why does a port has 12 bits and not 32?

[lpcware]

Content originally posted in LPCWare by Luis Digital on Fri May 20 17:55:14 MST 2011
Hi,

Weekend Question:

Why does a port has 12 bits and not 32?

Thanks.

[lpcware]

Content originally posted in LPCWare by NXP_Europe on Tue May 31 00:43:44 MST 2011
Hello Luis,

there is no specific philosophy with respect of no having a complete port used as io. Most of the pins are used for different functions. And some times no room is left for the standard io-function. Even microcontrollers with a large amount of pins do not have complete 0 ... 31 io's of one kind.

[lpcware]

Content originally posted in LPCWare by cyberstudio on Tue May 24 14:21:23 MST 2011
I think the 12-bit limitation has to do with masked access so that you can selectively change only some of those 12-bits. Basically, 12-bits from the I/O address itself decides the 12-bit mask of a port write or a port read.

As can be seen in the newest LPC11U00 series, I think NXP is moving away from the 12-bit limitation. LPC11U00 has more than 12-bits per port and it uses a separate register for masked access, while having some address space for you to change each individual port pins. This makes perfect sense, because in most applications, masked access is used to change only one pin at a time. It has a number of other much-requested enhancements, too, but as a result of these changes I don't think it maintains compatibility with the LPC1100 series, even though they sounded so similar other than the addition of an 'U' in the name.

[lpcware]

Content originally posted in LPCWare by Rob65 on Mon May 23 16:42:26 MST 2011
Bwah ... bored ...

I just spent some time getting the lpc1752 in my design, replacing the 1343.
Surprise: that chip does have 32 bits I/O ports.
P0 runs from 0.0 to 0.30 (... 0.8, 0.9, 0.10, 0.11, 0.15, 0.16, ...) and P1 goes 1.0, 1.1, 1.4, 1.8, 1.9, ... with P3 and P4 even worse.

Good thing they let go of the strange 12 bits limitation on the I/O ports :D
Must be some special design issue that has to do with routing of signals on the chip.

[lpcware]

Content originally posted in LPCWare by larryvc on Fri May 20 18:11:47 MST 2011
On what chip? Oh, probably 1343.  So they could reserve bits 31:12 of course.:rolleyes:

Why is 20 year old Port better than 12 year old Port?

Happy weekend!