Debugging ADC Burst mode

Discussion created by lpcware Employee on Jun 15, 2016
Content originally posted in LPCWare by JesperWe on Sun Jan 19 06:59:17 MST 2014
I am wrestling with getting ADC in burst mode to work on an LPC11U37 using LPC-Link

My problem is that when running under the debugger, reading the value from the ADC DRn does not seem to clear the DONE flag of that channel, as the manual says it should.

While thinking about the possible causes for this I started to wonder if the ADC unit was running independently of the CPU clock, and thus was doing new samples even if the debugger has the CPU halted...

So my first question is if this could be the case?

As I was wondering about this I thought maybe this was an option while debugging. (I am used to this from the Microchip environment where you can select what the peripheral clocks do while the CPU is halted by the debugger).

So I went into the debugger target configuration window, and started to look at the settings. Half of them I do not yet understand. And despite a lot of googling I could not find any documentation on the various settings in this window. The manual has a screen-dump of the window but no explanation of the individual settings.

So second question is: Where are those settings documented?