LPC11U23 : HALT FAULT if SDA is LOW

[lpcware]

Content originally posted in LPCWare by Dino on Mon Feb 11 06:46:41 MST 2013
I'm using the PLC11U23 and I set the I2C to slave. It works well but if, for any reason, the external hardware forces the SDA to Low and the SCL is still working it goes in the halt fault.
The Vectpc is set to = 0xfffff8 that is a  reserved memory, the I2C registers are set as :
I2CONSET  = 0X4C
I2CONCLR = 0X4C
I2STAT  = 0X80
I2CDAT = 0
I2ADR   = 0X3A
I2CCLH = 0X180
I2CCLL = 0X180
MMCTRL = 0
I2CADR1 = 0
I2CADR2 = 0
I2CADR3 = 0
I2DATA_BUFFER = 0
I2MASK0 = 0
I2MASK0 = 1
I2MASK0 = 2
I2MASK0 = 3

Have you any idea ?

[lpcware]

Content originally posted in LPCWare by Dino on Thu Feb 14 02:32:50 MST 2013
The ADR0 is 0x3A. I reported all the registers values read from LPXpresso using menu Peripherals and selecting  I2CON .
In this case the ADR0 is named I2ADR.
I'm working with our board that has more than one microcontroller connected to the I2c Bus. I know that this is an undesired operation but why  the LPC11U23 goes to  HALT FAULT  ?

Thanks

[lpcware]

Content originally posted in LPCWare by serge on Tue Feb 12 18:00:24 MST 2013
when SDA stays low and the SCL works normaly then my guess is that you have an arbitration condition on the bus. Normaly this happens only when two (or more) masters start sending at the same moment. The master which sends a high on the SDA line when actualy there is a low condition loses the arbitration and must stop sending immediatly.

Since your device is setup as a slave it should NOT be sending but listening on the bus at that very moment.

And what is the slave address in the ADR0 register? Or do you call it ADR?

I really need to get an LPC11Uxx board ....