17xx CAN acceptance filters

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17xx CAN acceptance filters

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by OXO on Mon Oct 10 01:59:43 MST 2011
In the Manual UM10360, p375


Quote:
Since each CAN bus has its own address map, each entry also contains the number of the CAN Controller (001-010) to which it applies.



Yet in the driver code these are defined as

#define CAN1_CTRL((uint8_t)(0))
#define CAN2_CTRL((uint8_t)(1))


Needless to say, I'm at the stage with this where it's not working, and everything looks wrong. I expect I'll have it figured out soon.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Ex-Zero on Mon Oct 10 06:12:40 MST 2011

Quote: OXO
Who is talking about names ??



Obviously the doc :eek: It's referencing 1 and 2 to CAN1 and CAN2 :)
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by OXO on Mon Oct 10 06:04:17 MST 2011
Who is talking about names ??

I am only interested in the [COLOR=DarkRed]values[/COLOR] stored in the table. The doc says 1 or 2, The code, presumably tested has 0 and 1.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Ex-Zero on Mon Oct 10 05:52:52 MST 2011
Why should these names be wrong? Someone named them CAN1 and CAN2 (that's better than 'Fritz' and 'Horst') and now it's history :mad:

How their registers are mapped and how we access them is a complete different question.
Of course the better approach would have been to name them CAN0 and CAN1 and I'll correct that if my damned time machine is working :eek:
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by OXO on Mon Oct 10 05:38:47 MST 2011

Quote: Zero
Yes :rolleyes:

That's because 2 (= 0x02:)) CAN controllers are named CAN1 and CAN2. Thats confusing all the digital and digital thinking people :eek:



So the document is wrong?
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Ex-Zero on Mon Oct 10 05:12:36 MST 2011

Quote: OXO
The values in the document are 001 and 010 binary = 1 & 2 decimal, but the values defined in the code, [U]and stored into the table[/U] are 0 and 1 decimal.



Yes :rolleyes:

That's because 2 (= 0x02:)) CAN controllers are named CAN1 and CAN2. Thats confusing all the digital and digital thinking people :eek:
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by OXO on Mon Oct 10 05:01:55 MST 2011

Quote: Zero
Are you surprised that CAN1 and CAN2 are mapped with constant 0 and 1 or are you surprised by missing 0b in UM 'CAN Controller ([COLOR=Red]0b[/COLOR]001-[COLOR=Red]0b[/COLOR]010)'?



The values in the document are 001 and 010 binary = 1 & 2 decimal, but the values defined in the code, [U]and stored into the table[/U] are 0 and 1 decimal.

Or am I missing some obvious thing?
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Ex-Zero on Mon Oct 10 04:54:24 MST 2011
Are you surprised that CAN1 and CAN2 are mapped with constant 0 and 1 or are you surprised by missing 0b in UM 'CAN Controller ([COLOR=Red]0b[/COLOR]001-[COLOR=Red]0b[/COLOR]010)'?
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by OXO on Mon Oct 10 04:53:49 MST 2011
I'm still stuck.

If I turn off the acceptance filter, I get received messages fine. Also works in self_reception, but nothing received if I enable the acceptance filter. I'm posting the code in case someone can quickly spot my foolish mistake.

The message ID I'm sending has the ID 0x7E8

void CAN_SetupAFTable(void) {
FullCAN_Table[0].controller = CAN1_CTRL;
FullCAN_Table[0].disable = MSG_DISABLE;
FullCAN_Table[0].id_11 = 0x01;
FullCAN_Table[1].controller = CAN1_CTRL;
FullCAN_Table[1].disable = MSG_DISABLE;
FullCAN_Table[1].id_11 = 0x02;
FullCAN_Table[2].controller = CAN1_CTRL;
FullCAN_Table[2].disable = MSG_DISABLE;
FullCAN_Table[2].id_11 = 0x03;
FullCAN_Table[3].controller = CAN1_CTRL;
FullCAN_Table[3].disable = MSG_DISABLE;
FullCAN_Table[3].id_11 = 0x06;
FullCAN_Table[4].controller = CAN1_CTRL;
FullCAN_Table[4].disable = MSG_DISABLE;
FullCAN_Table[4].id_11 = 0x0C;
FullCAN_Table[5].controller = CAN1_CTRL;
FullCAN_Table[5].disable = MSG_DISABLE;
FullCAN_Table[5].id_11 = 0x0D;

SFF_Table[0].controller = CAN1_CTRL;
SFF_Table[0].disable = MSG_DISABLE;
SFF_Table[0].id_11 = 0x08;
SFF_Table[1].controller = CAN1_CTRL;
SFF_Table[1].disable = MSG_DISABLE;
SFF_Table[1].id_11 = 0x09;
SFF_Table[2].controller = CAN1_CTRL;
SFF_Table[2].disable = MSG_DISABLE;
SFF_Table[2].id_11 = 0x0A;
SFF_Table[3].controller = CAN1_CTRL;
SFF_Table[3].disable = MSG_DISABLE;
SFF_Table[3].id_11 = 0x0B;
SFF_Table[4].controller = CAN1_CTRL;
SFF_Table[4].disable = MSG_DISABLE;
SFF_Table[4].id_11 = 0x0E;
SFF_Table[5].controller = CAN1_CTRL;
SFF_Table[5].disable = MSG_DISABLE;
SFF_Table[5].id_11 = 0x0F;

// first acceptance filter for diagnostic tools
SFF_GPR_Table[0].controller1 = SFF_GPR_Table[0].controller2 = CAN1_CTRL;
SFF_GPR_Table[0].disable1 = SFF_GPR_Table[0].disable2 = MSG_DISABLE;
SFF_GPR_Table[0].lowerID = 0x10;
SFF_GPR_Table[0].upperID = 0x20;

SFF_GPR_Table[1].controller1 = SFF_GPR_Table[1].controller2 = CAN1_CTRL;
SFF_GPR_Table[1].disable1 = SFF_GPR_Table[1].disable2 = MSG_DISABLE;
SFF_GPR_Table[1].lowerID = 0x20;
SFF_GPR_Table[1].upperID = 0x25;

SFF_GPR_Table[2].controller1 = SFF_GPR_Table[2].controller2 = CAN1_CTRL;
SFF_GPR_Table[2].disable1 = SFF_GPR_Table[2].disable2 = MSG_DISABLE;
SFF_GPR_Table[2].lowerID = 0x30;
SFF_GPR_Table[2].upperID = 0x40;

SFF_GPR_Table[3].controller1 = SFF_GPR_Table[3].controller2 = CAN1_CTRL;
SFF_GPR_Table[3].disable1 = SFF_GPR_Table[3].disable2 = MSG_DISABLE;
SFF_GPR_Table[3].lowerID = 0x40;
SFF_GPR_Table[3].upperID = 0x50;

SFF_GPR_Table[4].controller1 = SFF_GPR_Table[4].controller2 = CAN1_CTRL;
SFF_GPR_Table[4].disable1 = SFF_GPR_Table[4].disable2 = MSG_DISABLE;
SFF_GPR_Table[4].lowerID = 0x50;
SFF_GPR_Table[4].upperID = 0x60;

SFF_GPR_Table[5].controller1 = SFF_GPR_Table[5].controller2 = CAN1_CTRL;
SFF_GPR_Table[5].disable1 = SFF_GPR_Table[5].disable2 = MSG_ENABLE;
SFF_GPR_Table[5].lowerID = 0x7E8;
SFF_GPR_Table[5].upperID = 0x7EF;

EFF_Table[0].controller = CAN1_CTRL;
EFF_Table[0].ID_29 = (1 << 11);
EFF_Table[1].controller = CAN1_CTRL;
EFF_Table[1].ID_29 = (2 << 11);
EFF_Table[2].controller = CAN1_CTRL;
EFF_Table[2].ID_29 = (3 << 11);
EFF_Table[3].controller = CAN1_CTRL;
EFF_Table[3].ID_29 = (4 << 11);
EFF_Table[4].controller = CAN1_CTRL;
EFF_Table[4].ID_29 = (0x0e << 11);
EFF_Table[5].controller = CAN1_CTRL;
EFF_Table[5].ID_29 = (0x0f << 11);

EFF_GPR_Table[0].controller1 = EFF_GPR_Table[0].controller2 = CAN1_CTRL;
EFF_GPR_Table[0].lowerEID = (5 << 11);
EFF_GPR_Table[0].upperEID = (6 << 11);
EFF_GPR_Table[1].controller1 = EFF_GPR_Table[1].controller2 = CAN1_CTRL;
EFF_GPR_Table[1].lowerEID = (7 << 11);
EFF_GPR_Table[1].upperEID = (8 << 11);
EFF_GPR_Table[2].controller1 = EFF_GPR_Table[2].controller2 = CAN1_CTRL;
EFF_GPR_Table[2].lowerEID = (9 << 11);
EFF_GPR_Table[2].upperEID = (0x0a << 11);
EFF_GPR_Table[3].controller1 = EFF_GPR_Table[3].controller2 = CAN1_CTRL;
EFF_GPR_Table[3].lowerEID = (0x0b << 11);
EFF_GPR_Table[3].upperEID = (0x0c << 11);
EFF_GPR_Table[4].controller1 = EFF_GPR_Table[4].controller2 = CAN1_CTRL;
EFF_GPR_Table[4].lowerEID = (0x11 << 11);
EFF_GPR_Table[4].upperEID = (0x12 << 11);
EFF_GPR_Table[5].controller1 = EFF_GPR_Table[5].controller2 = CAN1_CTRL;
EFF_GPR_Table[5].lowerEID = (0x13 << 11);
EFF_GPR_Table[5].upperEID = (0x14 << 11);

AFTable.FullCAN_Sec = &FullCAN_Table[0];
AFTable.FC_NumEntry = 6;
AFTable.SFF_Sec = &SFF_Table[0];
AFTable.SFF_NumEntry = 6;
AFTable.SFF_GPR_Sec = &SFF_GPR_Table[0];
AFTable.SFF_GPR_NumEntry = 6;
AFTable.EFF_Sec = &EFF_Table[0];
AFTable.EFF_NumEntry = 6;
AFTable.EFF_GPR_Sec = &EFF_GPR_Table[0];
AFTable.EFF_GPR_NumEntry = 6;
}


void init_can(void)
{
PINSEL_CFG_Type PinCfg;

//Pins
PINSEL_ConfigPin((PINSEL_CFG_Type *) &can_rd1_pin);
PINSEL_ConfigPin((PINSEL_CFG_Type *) &can_td1_pin);

// p1.31 Select input
// Select lo = high speed = normal
// Select hi = silent mode = tx disabled
PinCfg.Funcnum = 0;
PinCfg.Portnum = 1;
PinCfg.Pinnum = 31;
PINSEL_ConfigPin(&PinCfg);
GPIO_SetDir( 0, 1<<31, 1);// output
GPIO_ClearValue(0, 1<<31);// low

//Initialize CAN1 baudrate
CAN_Init(LPC_CAN1, 500000);

//Enable Receive Interrupt
CAN_IRQCmd(LPC_CAN1, CANINT_FCE, ENABLE);
CAN_IRQCmd(LPC_CAN1, CANINT_RIE, ENABLE);
CAN_IRQCmd(LPC_CAN1, CANINT_DOIE, ENABLE);

CAN_SetupCBS(CANINT_FCE,  CAN_Callback0);
CAN_SetupCBS(CANINT_RIE,  CAN_Callback1);
CAN_SetupCBS(CANINT_DOIE, CAN_Callback2);


//CAN_IRQCmd(LPC_CAN1, CANINT_TIE1, ENABLE);
CAN_ModeConfig( LPC_CAN1, CAN_OPERATING_MODE, ENABLE);

// Set up acceptance filter
CAN_SetupAFTable();

CAN_ERROR er;
er = CAN_SetupAFLUT(LPC_CANAF, &AFTable);
CAN_SetAFMode(LPC_CANAF,CAN_Normal);

//Enable CAN Interrupt
NVIC_EnableIRQ(CAN_IRQn);

}
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