Content originally posted in LPCWare by frame on Thu Nov 15 07:32:59 MST 2012
Apart from PIC-bashing, I believe analogue blocks consume some more silicon, often require some
factory-trimming on the die, and pull in other blocks (like Vdd decoupling, band-gap voltage references, etc.).
And, to be honest, analogue periphery seems not to be one of NXP's strength, at least compared
to other Cortex M0/M3 vendors...
And what I miss most on Cortex M0 devices is a DIV/IDIV instruction.